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	<title>Observations from Uppsala &#187; books</title>
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		<title>Off-Topic: Sex, Bombs, and Burgers Review</title>
		<link>http://jakob.engbloms.se/archives/1470?&#038;owa_medium=feed&#038;owa_sid=</link>
		<comments>http://jakob.engbloms.se/archives/1470#comments</comments>
		<pubDate>Sat, 30 Jul 2011 20:08:18 +0000</pubDate>
		<dc:creator>Jakob</dc:creator>
				<category><![CDATA[books]]></category>
		<category><![CDATA[and burgers]]></category>
		<category><![CDATA[bombs]]></category>
		<category><![CDATA[Peter Nowak]]></category>
		<category><![CDATA[review]]></category>
		<category><![CDATA[sex]]></category>

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		<description><![CDATA[I just read the book Sex, Bombs, and Burgers, written by technology journalist Peter Nowak. The summary (minus some unnecessary hyperbole) from the book&#8217;s website reads: Peter Nowak argues that most of the major technological advances of the last sixty years have stemmed from the trio of billion-dollar industries that cater to our basest impulses. [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://jakob.engbloms.se/wp-content/uploads/2011/07/sex-bombs-burgers.jpg"><img class="alignleft size-full wp-image-1471" title="sex bombs burgers" src="http://jakob.engbloms.se/wp-content/uploads/2011/07/sex-bombs-burgers.jpg" alt="" width="115" height="115" /></a>I just read the book <a href="http://www.sexbombsburgers.com/"><em>Sex, Bombs, and Burgers</em></a>, written by technology journalist <a href="http://wordsbynowak.com/">Peter Nowak</a>. The summary (minus some unnecessary hyperbole) from the book&#8217;s website reads:</p>
<blockquote><p><em>Peter Nowak argues that most of the major technological advances of the last sixty years have stemmed from the trio of billion-dollar industries that cater to our basest impulses. From Saran Wrap to aerosols, digital cameras to cold medicine and GM foods to Google, many of the gadgets and conveniences we enjoy today can be traced back to either the porn, military or fast food industry.</em></p></blockquote>
<p>This certainly sounded interesting. And the book was a good read. However, it was not a great read.</p>
<p><span id="more-1470"></span>I applaud the research that Peter Nowak has put into the book, and all the fun anecdotes collected. Certainly makes for good conversation pieces and it explained a few long-standing mysteries to me. For example, the story about <a href="http://en.wikipedia.org/wiki/Lenna">The Lena</a>, which was a picture that kept popping up when I was doing desktop publishing in the early 1990s, without any explanation for why. It is a fun read, fluent and quick.</p>
<p>However, the book leaves me slightly disappointed and a bit annoyed.</p>
<p>It is a book that I consider to be &#8220;light fact&#8221; &#8211; with a title that plays on the &#8220;heavy scholar&#8221;-class book <a href="http://en.wikipedia.org/wiki/Guns,_Germs,_and_Steel"><em>Guns, Germs, and Steel</em></a>. It is nowhere near that book in depth, rigour, or explanation power. A bit presumptuous, simply.</p>
<p>The book is indeed very focused on the post-world-war-2 era, which makes some sense. But it would have been much more satisfying if Nowak had gone back and drawn the lines from antiquity forward. Also, it would have been nice with some contrasting between the Cold War&#8217;s strong drive to take on almost any technology with the 19th century&#8217;s somewhat more conservative military approach to new technologies like steam power. It is also a bit US-centric, and slightly chauvinistic in places. Sure, the US has led many innovations (and still does) &#8211; but a more global perspective would have made the book a bit more compelling.</p>
<p>If you look closely at the arguments being made, I have to find a bit of a fault with the inclusion of the porn (sex) industry. Sure, porn has been an early adopter of several new communications technologies, from the printing press and on. But it is not an innovation industry of its own, it is just an early adopter with some amount of money to spend. It certainly makes for a good provocative book title, but it is not really well reasoned. I would say that <em>vanity </em>is a better prime driver &#8211; showing off wealth and sophistication by consuming very expensive luxury goods has historically been an important financier of both fine arts and fine technology. It even ties back to sex &#8211; since in the end, strutting your stuff like a peacock is about capturing a fine specimen of the opposite sex.</p>
<p>The food (burger) industry is more apropos, since it is a huge enterprise industry of the kind that has traditionally both picked up on new innovations and set up labs to do its own innovation. No fault with that. But there are other industries that have done the same, including telecoms and computing.</p>
<p>Where the book really goes off and annoys is when Nowak switches from describing little-known facts in history to preaching and predicting the future. That just does not fit into the flow and premise of the book. Nowak talks about how automatic translation will make our online friendships span the globe &#8211; which is prediction, not description. And one that sounds a bit more like techno-hype than reasoned analysis. He does the same for robotics, maybe because robots are not really yet a part of everyday life, or he does not find industrial robots interesting enough.</p>
<p>The worst bit is the strange and misplaced discussion on genetically modified organisms. Their connection to the war theme is a bit a tenuous, and the lashing out at the EU for being skeptical and wanting to move slowly is pretty unreasoned. Nowak sounds like either a lobbyist wanting to get things marketed globally, or a techno-evangelist who thinks that technology can solve all problems. Which is a bit strange, since in other places in the book Nowak does address the many problems that modern technology has introduced along with the problems it solved. Still, his bias is very much on the benefits side rather than the risks involved.</p>
<p>In summary, a nice little collection of anecdotes that is worth reading in order to understand the funny background of many things we take for granted today. But it is no more than that, and be prepared for some out-of-scope chapters that preach and predict rather than describe the facts.</p>
<p>&nbsp;</p>
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		<title>Interrupts and Temporal Decoupling</title>
		<link>http://jakob.engbloms.se/archives/1384?&#038;owa_medium=feed&#038;owa_sid=</link>
		<comments>http://jakob.engbloms.se/archives/1384#comments</comments>
		<pubDate>Sun, 27 Feb 2011 21:09:17 +0000</pubDate>
		<dc:creator>Jakob</dc:creator>
				<category><![CDATA[books]]></category>
		<category><![CDATA[computer simulation technology]]></category>
		<category><![CDATA[ESL]]></category>
		<category><![CDATA[virtual platforms]]></category>
		<category><![CDATA[Grant Martin]]></category>
		<category><![CDATA[interrupt]]></category>
		<category><![CDATA[Temporal decoupling]]></category>
		<category><![CDATA[Tensilica]]></category>
		<category><![CDATA[virtual]]></category>

		<guid isPermaLink="false">http://jakob.engbloms.se/?p=1384</guid>
		<description><![CDATA[I am just finishing off reading the chapters of the Processor and System-on-Chip Simulation book (where I was part of contributing a chapter), and just read through the chapter about the Tensilica instruction-set simulator (ISS) solutions written by Grant Martin, Nenad Nedeljkovic and David Heine. They have a slightly different architecture from most other ISS [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://jakob.engbloms.se/wp-content/uploads/2009/04/gears1.png"><img class="alignleft size-full wp-image-737" style="margin: 5px;" title="gears1" src="http://jakob.engbloms.se/wp-content/uploads/2009/04/gears1.png" alt="" width="56" height="57" /></a>I am just finishing off reading the chapters of the <a href="http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-6174-7" target="_self"><em>Processor and System-on-Chip Simulation </em></a>book (where <a href="http://blogs.windriver.com/engblom/2011/01/processor-and-soc-simulation-book.html">I was part of contributing a chapter</a>), and just read through the chapter about the <a href="http://www.tensilica.com">Tensilica </a>instruction-set simulator (ISS) solutions written by <a href="http://www.chipdesignmag.com/martins/">Grant Martin</a>, Nenad Nedeljkovic and David Heine. They have a slightly different architecture from most other ISS solutions, since that they have an inherently variable target in the configurable and extensible Tensilica cores. However, the more interesting part of the chapter was the discussion on system modeling beyond the core. In particular, how they deal with interrupts to the core in the context of a <a href="http://jakob.engbloms.se/?s=temporal+decoupling">temporally decoupled </a>simulation.</p>
<p><span id="more-1384"></span>This is a small detail, but one where I have always had a feeling that some fundamental assumption was missing in my discussions with various people from the hardware design community. It always seemed that hardware designers assumed a different basic design &#8211; and Grant Martin explained it very well just what that was. They only check for interrupts at the beginning of a time slice. Which makes interrupts less precise  versus the code, but also makes the core interpreter fairly simple since all it has to do is to churn through instructions.</p>
<p>There is another solution, which is employed in Simics, where the processor can take an interrupt at any point in a time quantum. To do this, the processor needs to be aware of what is going to happen. The essentials of the solution is to have devices call the processor and tell it that they intend to interrupt it at some point T in time. The processor simulator then makes sure to stop and give the device model a chance to act at that exact point in time. It is obvious that this solution is easily generalized to cover all time callbacks needed to drive device work. A significant part of the responsibility for running the event-driven simulation is moved into the processor core.</p>
<p>Making the event queue visible to the processor also gives the processor a chance to hypersimulate, or skip idle  time. Since it knows the next point in time that something will happen  (either the end of a time quantum or an event posted by a device), it  can very easily, safely, and <a href="http://blogs.windriver.com/engblom/2010/09/deterministic-but-unpredictable.html">repeatably </a>jump forward in time without any  impact on simulation semantics.</p>
<p>When dealing with multiple processors, this means that each processor will have precise interrupts from the devices that are close to it. Timers and IO interrupts tend to work closely with a certain processor for a prolonged period of time. Interrupts between processors suffer a time-quantum delay sometimes, but that is no worse than the solution of checking all interrupts at time-quantum boundaries.</p>
<p>Qemu uses a solution which is a mix of the two. <a href="http://www.usenix.org/event/usenix05/tech/freenix/full_papers/bellard/bellard.pdf">According to the 2005 Usenix paper</a>, devices do call into the processor to announce an interrupt, but this is handled by &#8220;soon&#8221; returning to the processor main loop. Processors are not responsible for keeping track of interrupts, making it very imprecise and not very repeatable when interrupts will happen.</p>
<p>Thus, we can see that there are a few different ways to implement interrupts in virtual platforms. Each approach comes from a different tradition and features different trade-offs.</p>
<p>I was a bit surprised by the comment in the Tensilica chapter that only  correctly synchronized programs will work on a temporally decoupled  simulation. In my experience, temporal decoupling is transparent to software functionality &#8211; all software runs. The perceived timing of operations can be different, and some tightly-coupled code might behave in suboptimal ways, but it certainly runs and works. And lets you <a href="http://blogs.windriver.com/engblom/2010/06/true-concurrency-is-truly-different-again.html">observe  parallel code errors</a>.</p>
<p>Temporal decoupling is necessary in any fast platform, and its effect on semantics are really minor. With the simple tweak of having a processor know when interrupts might happen, it will also not affect the device-processor interface very much, maintaining very tight synchronization between processors and their controlled hardware.</p>
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		<title>Downloadable Book about Embedded Multicore</title>
		<link>http://jakob.engbloms.se/archives/877?&#038;owa_medium=feed&#038;owa_sid=</link>
		<comments>http://jakob.engbloms.se/archives/877#comments</comments>
		<pubDate>Sat, 08 Aug 2009 19:27:08 +0000</pubDate>
		<dc:creator>Jakob</dc:creator>
				<category><![CDATA[books]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[embedded systeme]]></category>
		<category><![CDATA[multicore computer architecture]]></category>
		<category><![CDATA[multicore debug]]></category>
		<category><![CDATA[multicore software]]></category>
		<category><![CDATA[virtual platforms]]></category>
		<category><![CDATA[freescale]]></category>
		<category><![CDATA[John Logan]]></category>
		<category><![CDATA[Jonas Svennebring]]></category>
		<category><![CDATA[Patrik Strömblad]]></category>

		<guid isPermaLink="false">http://jakob.engbloms.se/?p=877</guid>
		<description><![CDATA[Freescale has now released the collected, updated, and restyled book version of the article series on embedded multicore that I wrote last year together with Patrik Strömblad of Enea, and Jonas Svennebring, and John Logan of Freescale. The book covers the basics of multicore software and hardware, as well as operating systems issues and virtual [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.freescale.com"><img class="alignleft size-full wp-image-878" style="margin-left: 5px; margin-right: 5px;" title="freescale-logo-icon" src="http://jakob.engbloms.se/wp-content/uploads/2009/08/freescale-logo-icon.png" alt="freescale-logo-icon" width="80" height="80" /></a>Freescale has now released the collected, updated, and restyled <a href="http://www.freescale.com/files/32bit/doc/ref_manual/EMBMCRM.pdf">book version </a>of the article series on embedded multicore that I <a href="http://jakob.engbloms.se/archives/423">wrote last year </a>together with Patrik Strömblad of <a href="http://www.enea.com">Enea</a>, and Jonas Svennebring, and John Logan of <a href="http://www.freescale.com">Freescale</a>. The book covers the basics of multicore software and hardware, as well as operating systems issues and virtual platforms. Obviously, the virtual platform part was my contribution.</p>
<p><span id="more-877"></span></p>
<p>It is one of the more comprehensive introductions to how to think about and use multicore architectures in the high-end embedded space. It is free to download and print, but if you want a printed copy, such can be ordered at a price of (I am told) 15 USD (did not try it myself).</p>
<p>The PDF is at <a href="http://www.freescale.com/files/32bit/doc/ref_manual/EMBMCRM.pdf">http://www.freescale.com/files/32bit/doc/ref_manual/EMBMCRM.pdf </a>.</p>
<p>It will also be linked from the &#8220;Documentation&#8221; section for most Freescale multicore chips&#8217; information pages.</p>
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		<title>Book review: Taxonomies for the &#8230; Digital Systems</title>
		<link>http://jakob.engbloms.se/archives/175?&#038;owa_medium=feed&#038;owa_sid=</link>
		<comments>http://jakob.engbloms.se/archives/175#comments</comments>
		<pubDate>Sat, 26 Jul 2008 18:49:58 +0000</pubDate>
		<dc:creator>Jakob</dc:creator>
				<category><![CDATA[books]]></category>
		<category><![CDATA[computer simulation technology]]></category>
		<category><![CDATA[EDA]]></category>
		<category><![CDATA[ESL]]></category>
		<category><![CDATA[virtual platforms]]></category>
		<category><![CDATA[Brian Bailey]]></category>
		<category><![CDATA[Grant Martin]]></category>
		<category><![CDATA[research]]></category>
		<category><![CDATA[simulation]]></category>
		<category><![CDATA[Thomas Andersson]]></category>
		<category><![CDATA[VSIA]]></category>

		<guid isPermaLink="false">http://jakob.engbloms.se/?p=175</guid>
		<description><![CDATA[The book &#8220;Taxonomies for the Development and Verification of Digital Systems&#8220;, edited by Brian Bailey, Grant Martin, and Thomas Andersson, was published in 2005 by Springer Verlag. It is a legacy of the defunct VSIA, and presents an attempt to bring order to nomenclature and taxonomies in the chip design field (its scope is defined [...]]]></description>
			<content:encoded><![CDATA[<p class="firstHeading"><a href="http://jakob.engbloms.se/wp-content/uploads/2008/07/taxonomies-cover.png"><img class="alignleft size-medium wp-image-176" style="margin: 5px 10px;" title="taxonomies-cover" src="http://jakob.engbloms.se/wp-content/uploads/2008/07/taxonomies-cover-192x300.png" alt="" width="96" height="150" /></a>The book &#8220;<a href="http://www.springer.com/engineering/circuits+%26+systems/book/978-0-387-24019-0">Taxonomies for the Development and Verification of Digital Systems</a>&#8220;, edited by Brian Bailey, Grant Martin, and Thomas Andersson, was published in 2005 by Springer Verlag. It is a legacy of the <a href="http://vsi.org/">defunct VSIA</a>, and presents an attempt to bring order to nomenclature and taxonomies in the chip design field (its scope is defined to be broader than that, but in essence, the book is about SoC design for the most part).</p>
<p class="firstHeading"><span id="more-175"></span></p>
<p class="firstHeading">The book is obviously a collection of previous work, and the style is quite inconsistent from section to section. Not so much that it detracts from the value of the information, but it does feel a bit rushed.</p>
<p class="firstHeading">The book presents four sets of taxonomies:</p>
<ul>
<li>Models, which is by far the richest part. In addition to a definition of terms in the field of building models of digital systems, it also offers a detailed classification scheme for the models. The classification scheme uses five &#8220;resolution&#8221; axes along with an external/internal perspective to define what a model contains and at what level of resolution.</li>
<li>Functional Verification, which is really just a collection of terms.</li>
<li>Platform-Based Design, which is more of a marketing discussion in how to define and design platforms. Also mostly a definition of terms.</li>
<li>Hardware-Dependent Software (HdS), which defines terms. It has some attempts to classify software along some axes, but it does not really work out too well.</li>
</ul>
<p class="firstHeading">The main value is really in the second chapter, where it does provide a decent basis for discussing the level of abstraction at which models are created (note that accuracy is different from abstraction: a very detailed model at a very low level of abstraction can be totally off when considered from an accuracy perspective).</p>
<p class="firstHeading">However, I fear that the impact of this work has been fairly limited. No discussion on modeling that I have been participating in has really gone back to this basis and worked from there. I think a key problem here is that the material is only available as a quite expensive book from Springer, rather than as a freely downloadable document on the web. It is clear to me that spreading ideas today depends on free and easy digital access to the information&#8230; that&#8217;s why I have my own publications page up to make stuff that I have created available for reading.</p>
<p class="firstHeading">The hardware-dependent software (HdS) section gave rise to several &#8220;but they forgot X&#8221; comments from my part. For example, it is missing important aspects like processor virtualization, hypervisors, and IO virtualization (which totally change the game on HdS). Also, SMP operating systems are only giving a passing reference, with the focus on uniprocessors. And why do people keep using the term &#8220;<a href="http://en.wikipedia.org/wiki/Rate-monotonic_scheduling">Rate-Monotonic Analysis</a>? There are so many much more modern fixed-priority scheduling analysis theories, methods, and tools available that RMA is like talking about programming in assembler&#8230;</p>
<p class="firstHeading">What a choice for summer vacation reading&#8230;  and thanks to Bart Vanhournout at CoWare for the tip about the book in a discussion trying to pin down abstraction levels.</p>
<p class="firstHeading">
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		<title>Handbook of Real-Time and Embedded Systems</title>
		<link>http://jakob.engbloms.se/archives/30?&#038;owa_medium=feed&#038;owa_sid=</link>
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		<pubDate>Wed, 19 Sep 2007 19:57:50 +0000</pubDate>
		<dc:creator>Jakob</dc:creator>
				<category><![CDATA[articles]]></category>
		<category><![CDATA[books]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[embedded systeme]]></category>
		<category><![CDATA[Andreas Ermedahl]]></category>
		<category><![CDATA[Handbook of Real-Time and Embedded Systems]]></category>
		<category><![CDATA[real-time]]></category>
		<category><![CDATA[research]]></category>
		<category><![CDATA[wcet]]></category>
		<category><![CDATA[worst-case execution time analysis]]></category>

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		<description><![CDATA[The &#8220;Handbook of Real-Time and Embedded Systems&#8221; (ToC, Amazon, CRC Press) is now out. I and my university research colleague and friend Andreas Ermedahl have written a chapter on worst-case execution time analysis. We talk some about the theories and techniques, but we try to discuss practical experience in actual industrial use. Both static, dynamic, [...]]]></description>
			<content:encoded><![CDATA[<p><a title="Cover of Handbook of Embedded and Real-Time Systems" href="http://jakob.engbloms.se/wp-content/uploads/2007/09/handbook-rtes-2007-cover.png"><img title="Cover of Handbook of Embedded and Real-Time Systems" src="http://jakob.engbloms.se/wp-content/uploads/2007/09/handbook-rtes-2007-cover.thumbnail.png" alt="Cover of Handbook of Embedded and Real-Time Systems" hspace="10" align="left" /> </a>The &#8220;Handbook of Real-Time and Embedded Systems&#8221; (<a href="http://web.njit.edu/~leung/handbook07/index.htm">ToC</a>, <a href="http://www.amazon.com/Handbook-Real-Time-Embedded-Computer-Information/dp/1584886781">Amazon</a>, <a href="http://www.crcpress.com/shopping_cart/products/product_detail.asp?sku=C6781&amp;isbn=9781584886785&amp;parent_id=&amp;pc=">CRC Press</a>) is now out. I and my university research colleague and friend <a href="http://www.idt.mdh.se/~ael01/">Andreas Ermedahl</a> have written a chapter on worst-case execution time analysis. We talk some about the theories and techniques, but we try to discuss practical experience in actual industrial use. Both static, dynamic, and hybrid techniques are covered.</p>
<p>I just got my personal copy, but my first impression of the book overall is very positive. The contents seems quite practical to a large extent, not as academic as one might have feared. Do check it out if you are into the field. It is not a collection of research paper, rather instructive chapters informed by solid research but with applications in mind.<a title="Cover of Handbook of Embedded and Real-Time Systems" href="http://jakob.engbloms.se/wp-content/uploads/2007/09/handbook-rtes-2007-cover.png"><br />
</a></p>
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