When I grew up with computers, the big RISC vs CISC debate was raging. At the time, in the late 1980s, it did indeed seem that RISC was inherently superior to CISC. SPARCs, MIPS, and Alpha all outpaced boring old x86, VAX and 68000 processors. This turned out to be a historical parenthesis, as the Pentium Pro from Intel showed how RISC-style performance could be mated to a CISC ISA. However, maybe ISAs still do matter.
Tag Archives: Power Architecture
Does ISA Matter for Performance?
Memory Models: x86 is TSO, TSO is Good
By chance, I got to attend a day at the UPMARC Summer School with a very enjoyable talk by Francesco Zappa Nardelli from INRIA. He described his work (along with others) on understanding and modeling multiprocessor memory models. It is a very complex subject, but he managed to explain it very well.
Power Architecture Rip Van Winkle
For some reason (I guess it is the job…) I was browsing through the Power ISA version 2.06 specification last week and hit the following gem of an instruction: “rvwinkle“. It is named after a short story I had never heard about, but which apparently is sufficiently well-known in the US literary canon to warrant a sleep mode being named after it.
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Power Architecture Conference slides online
The slides from the Power Architecture Conference in München and Paris are now online (and have been for a few weeks) at the Power.org site for the event. Some interesting things there about Power Architecture in particular but also virtual platforms were an almost main theme of the show.
Freescale QorIQ P4080 Hybrid Simulation on YouTube(!)
YouTube – Freescale QorIQ P4080 Hybrid Simulation is a video of a demo of the QorIQ P4080 hybrid simulation. Cool of Freescale to be publishing it like this, I think it is a very smart move!
Updated: Here is the video inline, let’s see if this works.
Power Architecture Newsletter Article
Power.org publishes a quarterly newsletter over at www.power.org/news/newsletter. In the April 2008 issue it features a short article by me introducing Simics 4.0 and Simics Accelerator, the way in which Virtutech Simics takes advantage of multicore processors to simulate large target systems using a multithreaded simulator.
IBM z6: Multicore, Accelerators
Solaris to IBM, x86 to Apple, Power to Microsoft, and other flying pig events
The register report “IBM embraces – wtf – Sun’s Solaris across x86 server line” is a very appropriate headline for something quite surprising. The day before this happened, we discussed the announced announcement and said “nah, it can’t be about operating systems”. The idea of IBM in-sourcing Solaris for x86 just felt like the kind of thing that was in the same realm as flying pigs, freezing hells, and similar unlikely events.
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