Blog: Teaching a Class at Uppsala University

In the first quarter of 2024, I did a short stint as a teacher at Uppsala University. I taught the class “platform-spanning systems” (PSS), which is a fourth-year/masters-level course for engineering and computer science students. It was fun and rewarding to be back at the university, and I probably learnt as much as the my students.

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Embedded Conference Scandinavia 2024

The Embedded Conference Scandinavia took place at Kistamässan in Kista, Sweden, on April 10 and 11 2024. This was a reboot of a show that used to run as a small tradeshow/exhibition plus technical talks until the pandemic hit. There was no Embedded Show anymore, just the Embedded Conference and its speaker program. The ECS was instead co-located with Elektronikmässan, the long-running and apparently thriving gathering for “electronics” companies in Sweden.  

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Visiting Prague

Over Easter, I took a short trip to Prague with parts of the family. It is a fascinating place – full of tourists and tourist businesses, but still feeling informal and homey. We tried to climb as many towers as we possibly could and visited a ton of sights in a few intense days.

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“RISC-V in Practice” – Computer and System Architecture Unraveled Event Three

On Wednesday, March 13, we had our third CaSA, Computer and System Architecture Unraveled, meetup. Same place as the previous, the 25th floor of the Kista Science Tower building, thanks to the kind sponsorship of Vasakronan and our collaboration with Kista Science City. The theme this time was “The RISC-V ISA in Practice”, with two speakers named Björn. Another great event!

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Intel Blog: How to Boot Linux on Virtual Platform

Booting a software stack on a virtual platform is a necessary part of most software flows. It might seem simple, but in practice there are many different ways that it can happen.

In a recent Intel Blog post, I go through five ways to boot Linux on virtual platforms. Including the cases of doing it just like the hardware, but also how to “cheat” and directly boot from a kernel without first wrapping it in a disk image or similar.

DVCon Europe 2023 – 10th Anniversary Edition

The 2023 DVCon (Design and Verification) Europe conference took place on November 14 and 15, in the traditional location of the Holiday Inn Munich City Center. This was the 10th time the conference took place, serving as an excuse for a great anniversary dinner. Also new was the addition of a research track to provide academics publishing at the conference with the academic credit their work deserves. This year had a large number of papers related to virtual platforms, so writing this report has taken me longer than usual. There was just so much to cover.

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“Packet Networks are not Socket Science” – Computer and System Architecture Unraveled Event Two

On Wednesday, November 22, we had our second CaSA, Computer and System Architecture Unraveled, meetup. Same place in Kista as the last time, the 25th floor of the Kista Science Tower building, thanks to the kind sponsorship of Vasakronan and our collaboration with Kista Science City. This time, the theme was networking – but not at the socket level. Per Holmberg presented how his team used “micro sleep” for power management in line-rate network processing, and Hans Brandberg talked about the Precision Time Protocol. Another great event!

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Intel Blog: How Simics Executes Instructions

I recently added a blog post to the Intel Software blog about how the Intel Simics Simulator executes target-software instructions. The blog post appeared just before DVCon Europe (last week) and I did not have time to put a reflector here earlier.

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IBM WatsonX-AI, Kista Tech Tuesday

I attended a short Tech Tuesday morning session at IBM here in Kista, Sweden, where IBM presented their WatsonX-AI and related technologies. Tech Tuesdays is a monthly technical event organized by Kista Science City, where companies in Kista present some aspect of their technology in a 30-minute session. IBM managed to get an impressive amount of content into that time!

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The first Computer and System Architecture Unraveled Event in Kista – Great Speakers, Great Fun!

On the evening of the last Wednesday in September, we had our first CaSA, Computer and System Architecture Unraveled, event. CaSA is a meetup in Kista (Sweden) for people interested in computer architecture, system architecture, and how software and hardware interact down towards the lower levels of the stack. The topic for the inaugural event was “Core Count Explosion: A Challenge for Hardware and Software”, and it was great in some many ways!

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RI.SE AI Day – More on LLMs (and some)

The Swedish research institute RI.SE hosted an “Artificial Intelligence and Computer Science day” (AI and CS day) last week. RI.SE has a long tradition of hosting interesting open houses, both as RI.SE and in their previous guide as SiCS. The day was a mix of organized talks in the morning, and an open house where RI.SE researchers showed off their work in the afternoon. Most of the AI discussions were related to large language models (LLMs), but not all. I got some new insights about LLMs in general and using LLMs for coding in particular.

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Adventures Traveling to and from Italy

The big family vacation his summer was a cruise in the Mediterranean. Most cruises sail from Italian ports, unfortunately. Traveling to and within Italy is a bit of a challenge, resulting in far more heartburn and stress than necessary. Here is our story.

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The HidrateSpark… Internet of Drinking Bottles

Earlier this Summer, I received a HidrateSpark PRO water bottle as a gift. It is a fascinating piece of “smart” technology. The bottle itself is a decent piece of engineering and a somewhat practical product. But the overall product concept just strikes me as mostly contrived. The associated app is almost comical in its attempts to turn a piece of hardware into a “service”.

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Intel Blog: Demonstrating Simics Threading using RISC-V Simple

In my third post based on the Simics RISC-V simple virtual platform, I use the it to demonstrate how the Intel Simics simulator uses multiple host threads to simulate multiple target cores. The RISC-V platform is nice in that it has less noise than more complex platforms, allowing for clear and simple measurements.

That’s Odd: How iCue and Windows 11 Ruin Simics Performance

While working on some screenshots for an upcoming blog, I noticed something that something was off with the performance of Simics on my Windows 11 laptop. The CPU load did not quite go as high as I am used to – typically, compute-intense run should get close to 100% processor load using a single host thread to execute the simulation. Instead, I got to no more than about 50%, which was decidedly odd. I also had a screenshot from a few days earlier that showed some 90% CPU load. Turns out the culprit was a combination of factors, including the Windows 11 scheduler and the Corsair iCUE software pack.

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