DVCon Europe 2021 – Testbenches, AI, and Open Source

Just like in 2020, the Design and Verification Conference (DVCon) Europe 2021 was a virtual conference. It took place from October 26 to 27, with the SystemC Evolution day on October 28 (as usual). As has been the case in recent years, the verification side of the conference is significantly larger than the design side. … Continue reading “DVCon Europe 2021 – Testbenches, AI, and Open Source”

Presenting a Simics Tutorial at DVCon Europe (2021)

DVCon Europe is coming up in late October. This year, I am going to present a tutorial on using the public release of the Intel Simics Simulator to model a PCIe-attached accelerator subsystem. It is fun to be back speaking at the DVCon, after a couple of years of not having talked at the conference. … Continue reading “Presenting a Simics Tutorial at DVCon Europe (2021)”

DVCon Europe 2020 – Developing Hardware like Software?

The Design and Verification Conference Europe (DVCon Europe) took place back in late October 2020. In a normal year, we would add “in München, Germany” to the end of that sentence. But that is not how things were done in 2020. Instead, it was a virtual conference with world-wide attendance. Here are my notes on … Continue reading “DVCon Europe 2020 – Developing Hardware like Software?”

DVCon Europe 2018 / A Few Cool Papers

DVCon Europe took place in München, Bayern, Germany, on October 24 and 25, 2018. Here are some notes from the conference, including both general observations and some details on a few papers that were really quite interesting. This is not intended as an exhaustive replay, just my personal notes on what I found interesting.

Talking about Temporal Decoupling at DVCon Europe

This year’s Design and Verification Conference and Exhibition (DVCon Europe) takes place on October 24 and 25 (2018).  DVCon Europe has turned into the  best conference for virtual platform topics, and this year is no exception. There are some good talks coming!

Presenting about Simics and SystemC at DVCon Europe 2016

I am going to present a paper about our new SystemC Library in Simics, at the DVCon Europe conference taking place in München next month. The paper is titled “Integrating Different Types of Models into a Complete Virtual System – The Simics SystemC* Library”, and I authored it together with my Intel colleagues Andreas Hedström, … Continue reading “Presenting about Simics and SystemC at DVCon Europe 2016”

Minimum Viable (Replacement) Product – The Teams Example

During 2020 and 2021, Intel switched from using Microsoft Skype for Business (also known as Lync) to Microsoft Teams as the primary internal calling, chatting, and conferencing tool. While (finally) Teams has turned into quite a decent communications tool, the transition started a bit too early from a feature completeness perspective. Microsoft in essence gave … Continue reading “Minimum Viable (Replacement) Product – The Teams Example”

About Virtual Events

Just like most people who can, I have been working from home since March 2020 due to Covid-19. Now that we are hopefully seeing the end of the pandemic in the west, it is worth looking back at the conference-from-home aspect of work-from-home. I have seen our Simics training, the Design Automation Conference (DAC), the … Continue reading “About Virtual Events”

DAC 2019 – Cloud, a Book, an Award, and More

Last week was spent at the Design Automation Conference (DAC) in Las Vegas. I had a presentation and poster in the Designer/IP track about Clouds, Containers, and Virtual Platforms , and worked in the Intel Simulation Solutions booth at the show floor. The DAC was good as always, meeting many old friends in the industry … Continue reading “DAC 2019 – Cloud, a Book, an Award, and More”

Intel Blog Post: Additional Notes on Temporal Decoupling

A few weeks ago, I talked about temporal decoupling in virtual platforms at DVCon Europe 2018. I just posted some additional notes on the topic temporal decoupling on my Intel blog. In this new blog post, I discuss some more aspects of temporal decoupling, and how it affects simulation semantics. I also explain some of … Continue reading “Intel Blog Post: Additional Notes on Temporal Decoupling”

Talking Checkpointing in SystemC at the SystemC Evolution Day 2017

inThere will be a session on checkpointing in SystemC at the upcoming  SystemC Evolution Day in München on October 18, 2017. I will be presenting it, together with some colleagues from Intel. Checkpointing is a very interesting topic in its own right, and I have written lots about it in the past – both as … Continue reading “Talking Checkpointing in SystemC at the SystemC Evolution Day 2017”

Gary Stringham on Hardware Interface Design vs Virtual Platforms

I just read an interesting paper from the 2004 Embedded System’s Conference (ESC) written by Gary Stringham. It is called “ASIC Design Practices from a Firmware Perspective” and straddles the boundary between hardware design and driver software development. It was good to see someone take the viewpoint of “how you actually program a hardware device … Continue reading “Gary Stringham on Hardware Interface Design vs Virtual Platforms”