As a follow-up to my previous post on the scope of ESL, I found a nice tidbit in an EETimes article… basically saying that hardware design is declining inside the typical system houses.
Although some system companies have been experimenting with direct links to foundries by cutting out the ASIC design houses, the death of ASICs may have been greatly exaggerated. More accurately, “many ASSP companies are designing ASICs for high volume customers,” Gartner’s Lewis said. The “ASIC market is far from dead, but it trails the ASSP market,” he said.
Lewis cited Nokia, the world’s largest handset vendor, which has stopped designing its own ASICs. It recently opened up its IC sourcing to various chip vendors beyond usual suspects such as Texas Instruments and STMicroelectronics.
“System OEMs have no business designing ASICs any longer,” said Lewis. The reality is that system companies are finding it hard to do enough ASIC designs to keep in-house design teams employed.
When it was pointed out that Microsoft still has its own semiconductor technology group that is still designing various chips, Lewis responded, “How many ASICs per year does Microsoft design? Not many” compared to experienced ASIC/ASSIP vendors.
The key part here is the note on Nokia: System companies (like Nokia, Ericsson, Nokia-Siemens Networks, Huawei, ABB, BMW, etc.) are not too keen on ASIC designs anymore. I think that “Nokia stops doing ASICs” sounds a bit drastic… but it is definitely the case that hardware design is going to be much smaller as a part of these companies in the future, compared to software design.
Which means that virtual platforms supporting large-scale software development is more relevant than ever. And that these platforms just need to be made available, no matter what the source is. With no internal hardware teams involved in a platform design virtualization effort, you are usually much freer to consider innovative solutions than if chip designers are involved…
I think the future is in the gluing together of models from all kinds of sources written in all kinds of languages. And spanning the gamut of models from cycle-detailed models to pure functional fast models to abstractions like replacing entire boards or subsystems with behavioral models.