The Embedded World Exhibition and Conference 2019 is coming up in the last week of February. I will be there presenting a paper in the conference as well as demoing CoFluent in the Intel booth and some other miscellany. The paper “Shifting-Left Together – Enabling the Ecosystem with Virtual Platforms” is about how silicon vendors can (should) use virtual platforms to bring shift-left practices to their customers in addition to their own internal teams.
The paper describes accumulated lessons around the topic using virtual platforms to enable the ecosystem outside of a silicon vendor – before the hardware is available. Using virtual platforms to develop, integrate, and validate software and systems before first silicon is standard practice today, but it mostly stays internal to silicon companies. The internal benefits to a silicon vendor are huge: software support is in place when chips launch and ship to customers, bugs are found earlier in both software and hardware, the number of silicon re-spins is reduced, product quality improves, … etc etc… I have written rather extensively about this in the past.
However, there is no reason to stop there. Since the models exist already from internal usage, they can be provided to external customers too to accelerate their part of the silicon-to-market process.
When virtual platforms are provided to OEM (original equipment manufacturers) silicon customers ahead of hardware, the benefits of shift left get amplified. Now, the customer’s actual design featuring the silicon can be accelerated too, and be ready when the silicon arrives for inclusion in the final product.
The initial step for such joint shift-left is to use a virtual reference platform for the new silicon platform to develop and validate of custom BIOS, UEFI, boot code, and operating systems drivers ahead of silicon availability. Such software depends mostly on the silicon vendor platform, and the virtual platform provides an equivalent to early prototype boards or development prototype.
The next step is build out and reconstruct the virtual platform from a reference board to an actual model of the customer’s actual product board. By including more of the board in the model, more software can be tested early. In the end, we are looking at pre-silicon full-stack integration, from the lowest-level firmware all the way up to distributed applications running across multiple boards in a rack or other package.
My talk will discuss these aspects, how to actually build the models, and lessons learnt from doing shift-left at the product level.
The talk is on Wednesday, February 27, in the afternoon session “SoC II EDA II” between 16.00 and 17.30. Frank Schirrmeister of Cadence will also be talking in the same session – that’s a case of “long time no see” ,since he and I have both been active in the virtual platform and simulation area for a long time. We also have Cedrik Bock from Missing Link Electronics. This is part of the paid conference, not an open talk in the exhibition like the ones I did in 2018 and 2017.