The 2022 DVCon (Design and Verification) Europe conference was back in physical form at its usual venue at the Holiday Inn München. It was a great conference, and just like at the 2022 DAC people were very happy to be back in person.
Continue reading “DVCon Europe 2022. Verification, System Simulation, and People!”Category: appearances
Places where I appear in person
Notes from our DVCon Europe 2022 Tutorial
I presented a tutorial about the “verification of virtual platforms models” at DVCon Europe last week. The tutorial was prepared by me and Ola Dahl at Ericsson, but Ola unfortunately could not attend and present his part – so I had to learn his slides and style and do my best to be an Ola stand-in (tall order, we really missed you there Ola!). The title maybe did not entirely describe the contents – it was more a discussion around how to think about correctness and in particular specifications vs implementations. The best part was the animated discussion that we got going in the room, including some new insights from the audience that really added to the presented content.
Updated: Included an important point on software correctness that I forgot in the first publication.
Continue reading “Notes from our DVCon Europe 2022 Tutorial”Elektroniktidningen Magazine Article about DML
The November 2022 on-paper magazine from Swedish electronics news site Elektroniktidningen features an article I wrote about the Device Modeling Language (DML). Among many other really good articles.
Update: The article is now available online in HTML format.
Two Presentations at DVCON Europe 2022
DVCon (Design and Verification Conference) Europe is coming up in early December, in person, in München, Germany. The selection of papers and posters is finished, and the program is firming up. I am happy to report that I am part of two items on the menu, a personal record for DVCon! For more on DVCon Europe in general and how it has been in the past, see my previous blog post on DVCon Europe 2022.
Continue reading “Two Presentations at DVCON Europe 2022”DAC 2022 – Back in Person, Chiplets, an Award, and Much More
The 59th Design Automation Conference (DAC) took place in San Francisco, July 10-14, 2022. As always, the DAC provided a great place to learn about what is going on in EDA. The DAC is really three events in one: there is an industry trade-show/exhibition, a research conference that is considered the premier in EDA, and an engineering track where practitioners present their work in a less formal setting.
I had two talks in the engineering track – one on the Intel device modeling language (which actually won the best presentation award in the embedded sub-track), and one on using simulation technology to build hardware software-first.
The DAC was almost overwhelming in the richness of people and companies, but this blog tries to summarize the most prominent observations.
Continue reading “DAC 2022 – Back in Person, Chiplets, an Award, and Much More”DVCon Europe 2021 – Testbenches, AI, and Open Source
Just like in 2020, the Design and Verification Conference (DVCon) Europe 2021 was a virtual conference. It took place from October 26 to 27, with the SystemC Evolution day on October 28 (as usual). As has been the case in recent years, the verification side of the conference is significantly larger than the design side. This is common with the other DVCon conferences in the world. In this blog, I will go through my main observations from DVCon Europe, and share some notes from some of the presentations.
Continue reading “DVCon Europe 2021 – Testbenches, AI, and Open Source”Presenting a Simics Tutorial at DVCon Europe (2021)
DVCon Europe is coming up in late October. This year, I am going to present a tutorial on using the public release of the Intel Simics Simulator to model a PCIe-attached accelerator subsystem. It is fun to be back speaking at the DVCon, after a couple of years of not having talked at the conference. DVCon Europe is a virtual event this year too due to Covid.
Continue reading “Presenting a Simics Tutorial at DVCon Europe (2021)”The SAMOS XXI Conference (Virtual)
The International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) XXI conference took place a couple of weeks ago. Like all other events in the past 18 months, it was virtual due to Covid-19. For more on the background on the SAMOS conference, see my blog post about SAMOS XIX (from 2019). This year, I presented a tutorial about our public release of the Simics simulator and took the chance to listen to most of the other conference talks.
Continue reading “The SAMOS XXI Conference (Virtual)”The Virtual DAC 2020
I have attended the Design Automation Conference (DAC) occasionally for the past decade – maybe every second or third year. The DAC is typically mostly about the lower levels and the backend of hardware design, but there is always something to learn about virtual platforms and related topics closer to my interests. This year, like last year, I got a presentation (and poster) accepted for the Designer track. The DAC organizers held out hope for a physical conference for quite a while (back in early March it seemed rather unlikely that this would still be with us in July…). However, a physical conference was not to be, and the DAC switched to a virtual format in early May.
Continue reading “The Virtual DAC 2020”SAMOS 2019 – Insights, Mechanisms, Heterogeneity, and more
Earlier in July 2019, I had the honor of presenting one of the keynote talks at the 19th SAMOS (International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation) conference, held on the island of Samos in Greece. When I got the invite, I had no real idea what to expect. I asked around a bit and people said it was a good conference with a rather special vibe. I think that is a very good description of the conference: a special vibe. In addition to the usual papers and sessions, there is a strong focus on community and social events, fostering discussion across academic disciplines and between industry and academia. There were many really great discussions in addition to the paper and keynote presentations, and overall it was one of the most interesting conferences I have been to in recent years.
Continue reading “SAMOS 2019 – Insights, Mechanisms, Heterogeneity, and more”DAC 2019 – Cloud, a Book, an Award, and More
Last week was spent at the Design Automation Conference (DAC) in Las Vegas. I had a presentation and poster in the Designer/IP track about Clouds, Containers, and Virtual Platforms , and worked in the Intel Simulation Solutions booth at the show floor. The DAC was good as always, meeting many old friends in the industry as well as checking out the latest trends in EDA (hint: same trends as everywhere else). One particularly nice surprise was a book (the printed type, not the Vegas “book” that means something else entirely).
Continue reading “DAC 2019 – Cloud, a Book, an Award, and More”Embedded World 2019
The Embedded World in Nürnberg is still going strong as the best tradeshow for “Embedded” in the world. This year, I spent time doing booth duty and gave a talk in the Conference part of the event. There was an unusual high number of old friends and business acquaintances around, and it was a great experience overall with many fruitful discussions and connections for the future. However, it seems that there is always something that goes slightly awry with my travel to the show…
Continue reading “Embedded World 2019”Shifting Left Together at the Embedded World 2019
The Embedded World Exhibition and Conference 2019 is coming up in the last week of February. I will be there presenting a paper in the conference as well as demoing CoFluent in the Intel booth and some other miscellany. The paper “Shifting-Left Together – Enabling the Ecosystem with Virtual Platforms” is about how silicon vendors can (should) use virtual platforms to bring shift-left practices to their customers in addition to their own internal teams.
Continue reading “Shifting Left Together at the Embedded World 2019”A Little Snow Sure Can’t Hurt?
I had the honor to have a scheduled talk at the Embedded World 2018 show in Nürnberg, right at the start of the show on Tuesday morning. Getting to Nürnberg for the Embedded World without paying a fortune for plane tickets is tricky due to all the other people flying down from Swedish embedded and tech firms at the same time. This year, I was lucky and I had managed to get a very convenient flight at a decent price. Leaving Stockholm in the afternoon around 14.00 on Monday, flying via Frankfurt and then on to Nürnberg, arriving in the early evening just in time for a nice Bavarian dinner. No stress, no late evenings on the U-Bahn into town. A good night’s sleep before getting up and getting to the show with plenty of time to set up for my talk. What could possibly go wrong?
Talking at the Embedded World 2018
I 
will be presenting an Exhibitor Forum talk at the Embedded World in Nürnberg next week, about how to get to Agile and small batches for embedded. Using simulation to get around the annoying hard aspect of hardware.
More details at https://software.intel.com/en-us/blogs/2018/02/19/embedded-world-getting-agile-with-simulation
Talking Checkpointing in SystemC at the SystemC Evolution Day 2017
in
There will be a session on checkpointing in SystemC at the upcoming SystemC Evolution Day in München on October 18, 2017. I will be presenting it, together with some colleagues from Intel. Checkpointing is a very interesting topic in its own right, and I have written lots about it in the past – both as a technology and it applications.
Continue reading “Talking Checkpointing in SystemC at the SystemC Evolution Day 2017”
Presenting about Simics and SystemC at DVCon Europe 2016
I am going to present a paper about our new SystemC Library in Simics, at the DVCon Europe conference taking place in München next month. The paper is titled “Integrating Different Types of Models into a Complete Virtual System – The Simics SystemC* Library”, and I authored it together with my Intel colleagues Andreas Hedström, Xiuliang Wang, and Håkan Zeffer.
Continue reading “Presenting about Simics and SystemC at DVCon Europe 2016”
Wind River Guest Blog: Interview with Sangeeta, a CoFluent user doing Software Modeling
Even though I am now working for Intel, the nice folks at Wind River have let me do blogging on the Wind River blog as a guest anyway. I first blogged about the fantastic world of simulators that I have found inside Intel, and now a longer technical piece has appeared on a use of Intel CoFluent Studio. I interviewed Sangeeta Ghangam at Intel, who used CoFluent Studio to model the behavior of a complex software load on a gateway, connected to a set of sensor nodes. It is rather different from the very concrete software execution I work on with Simics. Being able to model and estimate the performance and cost and size of systems before you go to the concrete implementation is an important part of software and systems architecture, and CoFluent offers a neat tool for that.
Read the full story on the Wind River blog!
Speaking at the Embedded Conference Scandinavia
On November 3, 2015, I will give a presentation at the Embedded Conference Scandinavia about simulating IoT systems. The conference program can be found at http://www.svenskelektronik.se/ECS/ECS15/Program.html, with my session detailed at http://www.svenskelektronik.se/ECS/ECS15/Program/IoT%20Development.html.
My topic is how to realistically simulate very large IoT networks for software testing and system development. This is a fun field where I have spent significant time recently. Only a couple of weeks ago, I tried my hand simulating a 1000-node network. Which worked! I had 1000 ARM-based nodes running VxWorks running at the same time, inside a single Simics process, and at speeds close to real time! It did use some 55GB of RAM, which I think is a personal record for largest use of system resources from a single process. Still, it only took a dozen processors to do it.
Security for IoT Panel at the DAC 2015 – Can Security Gate your Release?
I had the great honor to be on a panel discussing IoT Security at the DAC back in June. The panel was part of the Embedded Techcon event that took place essentially as a little embedded corner inside the DAC – it was held in a couple of conference rooms next to the regular DAC sessions, and attendees were also mostly attending the DAC in general. Not a bad idea for meshing embedded and hardware design. The panel was a great one, and David Kleidermacher from Blackberry gave me a great take-away: unless security is allowed to gate releases of products, it is hard to think you take security seriously.
Continue reading “Security for IoT Panel at the DAC 2015 – Can Security Gate your Release?”
Speaking about Continuous Integration at the Embedded World Conference 2015
I am going to be speaking at the 2015 Embedded World Conference in Nürnberg, Germany. My talk is about Continuous Integration for embedded systems, and in particular how to enable it using simulation technology such as Simics.
My talk is at 16.00 to 16.30, in session 03/II, Software Quality I – Design & Verification Methods.
S4D 2012 – Notes
Last week, I attended my fourth System, Software, SoC and Silicon Degug conference (S4D) in a row. I think the silicon part is getting less attention these days, most of the papers were on how to debug software. Often with the help of hardware, and with an angle to how software runs in SoCs and systems. I presented a paper reviewing the technology and history of reverse debugging, which went down pretty well.
Paper & Talk at S4D 2012: Reverse Debug
I am going to the S4D conference for the third year in a row. This year, I have a paper on reverse debugging, reviewing the technology, products, and history of the idea. I will probably write a longer blog post after the conference, interesting things tend to come up.
Speaking at Embedded Conference Scandinavia
I am going to be talking about how to transport bugs with virtual platform checkpoints, in the Software Tools track at the Embedded Conference Scandinavia, on October 3, 2012, in Stockholm (Sweden). The ECS is a nice event, and there are several tracks to choose from both on October 2 and October 3. In addition to the tracks, Jan Bosch from Chalmers is going to present a keynote that I am sure will be very entertaining (see my notes from a presentation he did in Göteborg last year).
Speaking at SiCS Multicore Day 2012
I am scheduled to talk at the SiCS multicore day 2012 (like I did back in 2009 and 2008). The event takes palce on September 13, at SiCS in Kista. My topic will be on System-Level Debug – how we can make debuggers that work for big systems.
This year, the multicore day is part of a bigger Software Week event, which also covers cloud and internet of things. See you there!
Youtube Movie on Reverse Execution (and a small bit of Reverse Debug)
We just uploaded a short movie about reverse execution and reverse debugging to Youtube, to the Wind River official channel. In the short time available in this demo, we really only show reverse execution. Reverse debug, as I define it, is not used much at all, as explaining what goes on when you start to put breakpoints into a program and analyze its behavior takes a surprising amount of time.
Continue reading “Youtube Movie on Reverse Execution (and a small bit of Reverse Debug)”
Keynote on System-Level Debug
I have now posted the slides from my keynote talk at the S4D 2011 conference to the presentations list on my regular home page. The topic of that talk was “System-Level Debug”, something which has started to interest me in recent years.
S4D 2010
Looks like S4D (and the co-located FDL) is becoming my most regular conference. S4D is a very interactive event. With some 20 to 30 people in the room, many of them also presenting papers at the conference, it turns into a workshop at its best. There were plenty of discussion going on during sessions and the breaks, and I think we all got new insights and ideas.
Additional Notes on Transporting Bugs with Checkpoints
This post features some additional notes on the topic of transporting bugs with checkpoints, which is the subject of a paper at the S4D 2010 conference.
The idea of transporting bugs with checkpoints is some ways obvious. If you have a checkpoint of a state, of course you move it. Right? However, changing how you think about reporting bugs takes time. There are also some practical issues to be resolved. The S4D paper goes into some of the aspects of making checkpointing practical.
Continue reading “Additional Notes on Transporting Bugs with Checkpoints”
S4D Paper on Transporting Bugs with Checkpoints
I have a paper about “Transporting Bugs with Checkpoints” to be presented at the S4D (System, Software, SoC and Silicon Debug) conference in Southampton, UK, on September 15 and 16, 2010. The core concept presented is to leverage Simics checkpointing to capture and move a bug from the bug reporter to the responsible developer. It is a fairly simple idea, but getting it to work efficiently does require that some things are done right. See the longer Wind River blog posting about this topic for a few more details.