Two Presentations at DVCON Europe 2022

DVCon (Design and Verification Conference) Europe is coming up in early December, in person, in München, Germany. The selection of papers and posters is finished, and the program is firming up. I am happy to report that I am part of two items on the menu, a personal record for DVCon! For more on DVCon Europe in general and how it has been in the past, see my previous blog post on DVCon Europe 2022.   

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DAC 2022 – Back in Person, Chiplets, an Award, and Much More

The 59th Design Automation Conference (DAC) took place in San Francisco, July 10-14, 2022.  As always, the DAC provided a great place to learn about what is going on in EDA. The DAC is really three events in one: there is an industry trade-show/exhibition, a research conference that is considered the premier in EDA, and an engineering track where practitioners present their work in a less formal setting.

I had two talks in the engineering track – one on the Intel device modeling language (which actually won the best presentation award in the embedded sub-track), and one on using simulation technology to build hardware software-first. 

The DAC was almost overwhelming in the richness of people and companies, but this blog tries to summarize the most prominent observations.

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DVCon Europe 2021 – Testbenches, AI, and Open Source

Just like in 2020, the Design and Verification Conference (DVCon) Europe 2021 was a virtual conference. It took place from October 26 to 27, with the SystemC Evolution day on October 28 (as usual). As has been the case in recent years, the verification side of the conference is significantly larger than the design side. This is common with the other DVCon conferences in the world. In this blog, I will go through my main observations from DVCon Europe, and share some notes from some of the presentations.

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Presenting a Simics Tutorial at DVCon Europe (2021)

DVCon Europe is coming up in late October. This year, I am going to present a tutorial on using the public release of the Intel Simics Simulator to model a PCIe-attached accelerator subsystem. It is fun to be back speaking at the DVCon, after a couple of years of not having talked at the conference. DVCon Europe is a virtual event this year too due to Covid.

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The SAMOS XXI Conference (Virtual)

The International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) XXI conference took place a couple of weeks ago. Like all other events in the past 18 months, it was virtual due to Covid-19. For more on the background on the SAMOS conference, see my blog post about SAMOS XIX (from 2019). This year, I presented a tutorial about our public release of the Simics simulator and took the chance to listen to most of the other conference talks.

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The Virtual DAC 2020

I have attended the Design Automation Conference (DAC) occasionally for the past decade – maybe every second or third year. The DAC is typically mostly about the lower levels and the backend of hardware design, but there is always something to learn about virtual platforms and related topics closer to my interests. This year, like last year, I got a presentation (and poster) accepted for the Designer track. The DAC organizers held out hope for a physical conference for quite a while (back in early March it seemed rather unlikely that this would still be with us in July…). However, a physical conference was not to be, and the DAC switched to a virtual format in early May.

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SAMOS 2019 – Insights, Mechanisms, Heterogeneity, and more

Earlier in July 2019, I had the honor of presenting one of the keynote talks at the 19th SAMOS (International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation) conference, held on the island of Samos in Greece. When I got the invite, I had no real idea what to expect. I asked around a bit and people said it was a good conference with a rather special vibe. I think that is a very good description of the conference: a special vibe. In addition to the usual papers and sessions, there is a strong focus on community and social events, fostering discussion across academic disciplines and between industry and academia. There were many really great discussions in addition to the paper and keynote presentations, and overall it was one of the most interesting conferences I have been to in recent years.

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DAC 2019 – Cloud, a Book, an Award, and More

Last week was spent at the Design Automation Conference (DAC) in Las Vegas. I had a presentation and poster in the Designer/IP track about Clouds, Containers, and Virtual Platforms , and worked in the Intel Simulation Solutions booth at the show floor. The DAC was good as always, meeting many old friends in the industry as well as checking out the latest trends in EDA (hint: same trends as everywhere else).  One particularly nice surprise was a book (the printed type, not the Vegas “book” that means something else entirely).

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Embedded World 2019

The Embedded World in Nürnberg is still going strong as the best tradeshow for “Embedded” in the world. This year, I spent time doing booth duty and gave a talk in the Conference part of the event. There was an unusual high number of old friends and business acquaintances around, and it was a great experience overall with many fruitful discussions and connections for the future.  However, it seems that there is always something that goes slightly awry with my travel to the show…

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Shifting Left Together at the Embedded World 2019

The Embedded World Exhibition and Conference 2019 is coming up in the last week of February. I will be there presenting a paper in the conference as well as demoing CoFluent in the Intel booth and some other miscellany. The paper “Shifting-Left Together – Enabling the Ecosystem with Virtual Platforms” is about how silicon vendors can (should) use virtual platforms to bring shift-left practices to their customers in addition to their own internal teams.   

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A Little Snow Sure Can’t Hurt?

I had the honor to have a scheduled talk at the Embedded World 2018 show in Nürnberg, right at the start of the show on Tuesday morning.  Getting to Nürnberg for the Embedded World without paying a fortune for plane tickets is tricky due to all the other people flying down from Swedish embedded and tech firms at the same time. This year, I was lucky and I had managed to get a very convenient flight at a decent price. Leaving Stockholm in the afternoon around 14.00 on Monday, flying via Frankfurt and then on to Nürnberg, arriving in the early evening just in time for a nice Bavarian dinner. No stress, no late evenings on the U-Bahn into town. A good night’s sleep before getting up and getting to the show with plenty of time to set up for my talk. What could possibly go wrong?

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Talking at the Embedded World 2018

I will be presenting an Exhibitor Forum talk at the Embedded World in Nürnberg next week, about how to get to Agile and small batches for embedded. Using simulation to get around the annoying hard aspect of hardware.

More details at https://software.intel.com/en-us/blogs/2018/02/19/embedded-world-getting-agile-with-simulation

Talking Checkpointing in SystemC at the SystemC Evolution Day 2017

inThere will be a session on checkpointing in SystemC at the upcoming  SystemC Evolution Day in München on October 18, 2017. I will be presenting it, together with some colleagues from Intel. Checkpointing is a very interesting topic in its own right, and I have written lots about it in the past – both as a technology and it applications.

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Presenting about Simics and SystemC at DVCon Europe 2016

I am going to present a paper about our new SystemC Library in Simics, at the DVCon Europe conference taking place in München next month. The paper is titled “Integrating Different Types of Models into a Complete Virtual System – The Simics SystemC* Library”, and I authored it together with my Intel colleagues Andreas Hedström, Xiuliang Wang, and Håkan Zeffer.

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Wind River Guest Blog: Interview with Sangeeta, a CoFluent user doing Software Modeling

Cofluent studioEven though I am now working for Intel, the nice folks at Wind River have let me do blogging on the Wind River blog as a guest anyway.  I first blogged about the fantastic world of simulators that I have found inside Intel, and now a longer technical piece has appeared on a use of Intel CoFluent Studio. I interviewed Sangeeta Ghangam at Intel, who used CoFluent Studio to model the behavior of a complex software load on a gateway, connected to a set of sensor nodes. It is rather different from the very concrete software execution I work on with Simics. Being able to model and estimate the performance and cost and size of systems before you go to the concrete implementation is an important part of software and systems architecture, and CoFluent offers a neat tool for that.

Read the full story on the Wind River blog!