Reversing out of Reverse

The Intel Simics simulator version 7 removed a long-standing feature from the simulator framework. Reverse execution is no longer available. In its place, in-memory snapshots were introduced, which arguably offer most of the benefits at a lower implementation cost. What happened? I’ve been asked about the reasoning behind the chance on several occasions since I left Intel. I’d like to share my perspective on the decision, as it highlights the challenges of turning an idea into a robust, shippable feature.

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“Processor Performance Insights and Optimization” – Computer and System Architecture Unraveled Event Four

Finally, the fourth CaSA, Computer and System Architecture Unraveled, meetup happened on November 6. It took far too long to get it organized, but we finally did it. The theme was about processor performance analysis and efficient processor implementation, offering two talks from very different perspectives. The location was almost the same as before, on the 19th floor of the Kista Science Tower building. Once more thanks to the sponsorship from Vasakronan and Kista Science City.

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DVCon Europe 2024 – AI and More

The 2024 DVCon (Design and Verification) Europe conference took place on October 15 and 16, in its traditional location at the Holiday Inn Munich City Centre. This year there was even more talk of artificial intelligence than last year, and quite a few sessions related to virtual platforms. And lots of other interesting presentations and discussions.

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Embedded Conference Scandinavia 2024

The Embedded Conference Scandinavia took place at Kistamässan in Kista, Sweden, on April 10 and 11 2024. This was a reboot of a show that used to run as a small tradeshow/exhibition plus technical talks until the pandemic hit. There was no Embedded Show anymore, just the Embedded Conference and its speaker program. The ECS was instead co-located with Elektronikmässan, the long-running and apparently thriving gathering for “electronics” companies in Sweden.  

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The Mathworks Automotive Conference (MAC) 2022

The Mathworks Automotive Conference (MAC) 2022 was one-day vendor-specific conference about how Mathworks products can be/are used in the automotive sector. The set of companies represented was truly impressive. There were presentations from Lightyear, MAN, Mercedes-Benz, Volvo, Infineon, Toyota, Bosch, Continental, Real-Time Innovations, and of course the Mathworks themselves. It was a day well-spent listening to interesting talks. Here is my personal summary.

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DAC 2022 – Back in Person, Chiplets, an Award, and Much More

The 59th Design Automation Conference (DAC) took place in San Francisco, July 10-14, 2022.  As always, the DAC provided a great place to learn about what is going on in EDA. The DAC is really three events in one: there is an industry trade-show/exhibition, a research conference that is considered the premier in EDA, and an engineering track where practitioners present their work in a less formal setting.

I had two talks in the engineering track – one on the Intel device modeling language (which actually won the best presentation award in the embedded sub-track), and one on using simulation technology to build hardware software-first. 

The DAC was almost overwhelming in the richness of people and companies, but this blog tries to summarize the most prominent observations.

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The ESA Schiaparelli Crash & Simulation

Back in 2016, the European Space Agency (ESA) lost the Schiaparelli Mars lander during its descent to the surface on Mars. From a software engineering and testing perspective, the story of why the landing failed (see for example the ESA final analysis, Space News, or the BBC) is instructive. It comes down to how software is written and tested to deal with unexpected inputs in unexpected circumstances. I published a blog post about this right after the event and before the final analysis was available. Thankfully, that has since been retired from its original location-it was a bit too full of speculation that turned out to be incorrect… So here is a mostly rewritten version of the post, quoting the final analysis and with new insights.  

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DVCon Europe 2021 – Testbenches, AI, and Open Source

Just like in 2020, the Design and Verification Conference (DVCon) Europe 2021 was a virtual conference. It took place from October 26 to 27, with the SystemC Evolution day on October 28 (as usual). As has been the case in recent years, the verification side of the conference is significantly larger than the design side. This is common with the other DVCon conferences in the world. In this blog, I will go through my main observations from DVCon Europe, and share some notes from some of the presentations.

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Jerry Fiddler on the Early Days of Wind River and Building a Product

Wind River is celebrating their 40th anniversary as a company with a series of historical look-backs posted on the Wind River channel on YouTube. One of the videos is an interview with Jerry Fiddler who founded Wind River back in 1981, by Wind River current CEO Kevin Dallas. Jerry Fiddler talks about how he got started in computers, and especially about how Wind River got started and grew.  It is both a fantastic set of historical anecdotes and some solid product management and strategy insights.

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Professor Reinhard Wilhelm on the History of WCET Analysis

Back when I was a PhD student working on worst-case execution-time (WCET) analysis, one of the leading groups researching the topic was the “Saarbrücken gang” led by Professor Reinhard Wilhelm. Last year, Professor Wilhelm published a retrospective look on their work on WCET in the Communications of the ACM. It is a really interesting history write-up from the perspective of the Saarbrücken group.

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CACM on DSAs

The July 2020 edition of the Communications of the ACM (CACM) had a front-page theme of “Domains-Specific Hardware Accelerators”, or DSAs. It contained two articles about the subject, one about an academic genomics accelerator, and one about the Google TPU. Hardware accelerators dedicated to particular types of computation are basically everywhere today, and an accepted part of the evolution of computers. The CACM articles have some good tidbits and points about how accelerators are designed and used today. At the same time, I also found a youtube talk about the first hardware accelerator, the IBM Stretch HARVEST, showing both contrasts with today as well as a remarkable continuity in concept.

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DAC 2019 – Cloud, a Book, an Award, and More

Last week was spent at the Design Automation Conference (DAC) in Las Vegas. I had a presentation and poster in the Designer/IP track about Clouds, Containers, and Virtual Platforms , and worked in the Intel Simulation Solutions booth at the show floor. The DAC was good as always, meeting many old friends in the industry as well as checking out the latest trends in EDA (hint: same trends as everywhere else).  One particularly nice surprise was a book (the printed type, not the Vegas “book” that means something else entirely).

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Embedded World 2019

The Embedded World in Nürnberg is still going strong as the best tradeshow for “Embedded” in the world. This year, I spent time doing booth duty and gave a talk in the Conference part of the event. There was an unusual high number of old friends and business acquaintances around, and it was a great experience overall with many fruitful discussions and connections for the future.  However, it seems that there is always something that goes slightly awry with my travel to the show…

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Shifting Left Together at the Embedded World 2019

The Embedded World Exhibition and Conference 2019 is coming up in the last week of February. I will be there presenting a paper in the conference as well as demoing CoFluent in the Intel booth and some other miscellany. The paper “Shifting-Left Together – Enabling the Ecosystem with Virtual Platforms” is about how silicon vendors can (should) use virtual platforms to bring shift-left practices to their customers in addition to their own internal teams.   

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Microsoft REPT: You CAN Reverse from a Core Dump!

There are some things in computing that seem “obviously” true and that “clearly” make it “impossible” to do some things.  One example of this is the idea that you cannot go backwards in time from the current state of a program or computer system and recover previous state by just reversing the semantics of the instructions in the program.  In particular, that you cannot take a core dump from a failed system and reverse-execute back from it – how could you?  In order to do reverse debugging and reverse execution, you “have to” record the state at the first point in time that you want to be able to go back to, and then record all changes to the state. Turns out I was wrong, as shown by a recent Usenix OSDI paper.

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