DAC 2022 – Back in Person, Chiplets, an Award, and Much More

The 59th Design Automation Conference (DAC) took place in San Francisco, July 10-14, 2022.  As always, the DAC provided a great place to learn about what is going on in EDA. The DAC is really three events in one: there is an industry trade-show/exhibition, a research conference that is considered the premier in EDA, and an engineering track where practitioners present their work in a less formal setting.

I had two talks in the engineering track – one on the Intel device modeling language (which actually won the best presentation award in the embedded sub-track), and one on using simulation technology to build hardware software-first. 

The DAC was almost overwhelming in the richness of people and companies, but this blog tries to summarize the most prominent observations.

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DVCon Europe 2021 – Testbenches, AI, and Open Source

Just like in 2020, the Design and Verification Conference (DVCon) Europe 2021 was a virtual conference. It took place from October 26 to 27, with the SystemC Evolution day on October 28 (as usual). As has been the case in recent years, the verification side of the conference is significantly larger than the design side. This is common with the other DVCon conferences in the world. In this blog, I will go through my main observations from DVCon Europe, and share some notes from some of the presentations.

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Intel Blog Post: Shift-Left for a Snowy Ridge

There is a new blog post on the Intel Developer Zone on how we used Simics virtual platforms for the new Intel® Atom® P5900 series of system-on-chip (previously known as Snow Ridge). It talks about how shift-left works both inside of Intel and with our customers for the new chip, and the kinds of virtual platform models you use for different types of use cases.

See https://software.intel.com/en-us/blogs/2020/03/17/seeing-the-early-snow-on-the-ridge

Intel Blog: A Mountain and Threading for Simics 6

A new short blog post on my Intel Developer Zone blog talks about the improved threading simulation core we have added in Simics version 6… and about how a colleague of mine climbed to the top of the highest mountain in Europe and showed a flag with our new Simics icon! Read the story at https://software.intel.com/en-us/blogs/2019/09/10/simics-6-at-the-mountain-top.

Intel Blog: Simics 6 Device Register Coverage

I have a new blog post out on the Intel Developer Zone, about the Simics 6 device register coverage feature. I use device register coverage to look at how different operating systems use the same hardware. The differences are significant, demonstrating the (rather expected) observation that different software stacks use the same hardware in different ways.

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SAMOS 2019 – Insights, Mechanisms, Heterogeneity, and more

Earlier in July 2019, I had the honor of presenting one of the keynote talks at the 19th SAMOS (International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation) conference, held on the island of Samos in Greece. When I got the invite, I had no real idea what to expect. I asked around a bit and people said it was a good conference with a rather special vibe. I think that is a very good description of the conference: a special vibe. In addition to the usual papers and sessions, there is a strong focus on community and social events, fostering discussion across academic disciplines and between industry and academia. There were many really great discussions in addition to the paper and keynote presentations, and overall it was one of the most interesting conferences I have been to in recent years.

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Intel Blog Post: Clear Linux for Simics Demo & Training

For Simics training and demo purposes, we often use Linux* running on the virtual platforms. In the early days of Simics and embedded Linux, we built our own minimal configurations by hand to run on simple target systems. Most recently, we changed our Linux default demo and training setup to use Clear Linux*. This change showed us just how sophisticated modern Linux setups are – which is good in general, but it also can make some low-level details more complicated.

I wrote an Intel Developer Zone Blog Post about our experience moving to Clear Linux for Simics demos and training, which contains a lot more details of what we observed and did to make this work for our purposes.

DAC 2019 – Cloud, a Book, an Award, and More

Last week was spent at the Design Automation Conference (DAC) in Las Vegas. I had a presentation and poster in the Designer/IP track about Clouds, Containers, and Virtual Platforms , and worked in the Intel Simulation Solutions booth at the show floor. The DAC was good as always, meeting many old friends in the industry as well as checking out the latest trends in EDA (hint: same trends as everywhere else).  One particularly nice surprise was a book (the printed type, not the Vegas “book” that means something else entirely).

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Intel Blog Posts: Running Simics in Containers

Running Simics inside a container is a topic that has come up several times in recent years. In a two-part Intel Developer Zone blog post, my colleague Mambwe Mumbwa and I discuss both some background on container technology, how and how well Simics can run inside of containers, and what you can with containerized Simicses. Overall, containers offer a very good alternative to virtual machines for running programs like Simics, and the tool ecosystem opens up some exciting new ways to manage Simics installations and simulation instances.

Update: this post was extended to link to both part 1 and part 2 of the blog.

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Embedded World 2019

The Embedded World in Nürnberg is still going strong as the best tradeshow for “Embedded” in the world. This year, I spent time doing booth duty and gave a talk in the Conference part of the event. There was an unusual high number of old friends and business acquaintances around, and it was a great experience overall with many fruitful discussions and connections for the future.  However, it seems that there is always something that goes slightly awry with my travel to the show…

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Talking about Temporal Decoupling at DVCon Europe

This year’s Design and Verification Conference and Exhibition (DVCon Europe) takes place on October 24 and 25 (2018).  DVCon Europe has turned into the  best conference for virtual platform topics, and this year is no exception. There are some good talks coming!

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A Little Snow Sure Can’t Hurt?

I had the honor to have a scheduled talk at the Embedded World 2018 show in Nürnberg, right at the start of the show on Tuesday morning.  Getting to Nürnberg for the Embedded World without paying a fortune for plane tickets is tricky due to all the other people flying down from Swedish embedded and tech firms at the same time. This year, I was lucky and I had managed to get a very convenient flight at a decent price. Leaving Stockholm in the afternoon around 14.00 on Monday, flying via Frankfurt and then on to Nürnberg, arriving in the early evening just in time for a nice Bavarian dinner. No stress, no late evenings on the U-Bahn into town. A good night’s sleep before getting up and getting to the show with plenty of time to set up for my talk. What could possibly go wrong?

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Talking at the Embedded World 2018

I will be presenting an Exhibitor Forum talk at the Embedded World in Nürnberg next week, about how to get to Agile and small batches for embedded. Using simulation to get around the annoying hard aspect of hardware.

More details at https://software.intel.com/en-us/blogs/2018/02/19/embedded-world-getting-agile-with-simulation

Intel Blog Post: Using Wind River® Simics® to Inspire Teachers and Researchers in Costa Rica

A while ago, I visited my Intel colleagues in Costa Rica and ran a workshop for university teachers and researchers, showing how Simics could be used in academia.  I worked with a very smart and talented intern, Jose Fernando Molina, and after a rather long process I have published an interview with him on my Intel blog: https://software.intel.com/en-us/blogs/2017/12/05/windriver-simics-to-inspire-teachers-costarica

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Intel Blog Post: Looking at the Instruction Mix of Windows 10

In a previous Intel blog post “Question: Does Software Actually Use New Instruction Sets?” I looked at the kinds of instructions used by few different Linux setups, and how each setup was affected by changing the type of the processor it was running on (comparing Nehalem to Skylake).  As a follow-up to that post, I have now done the same for Microsoft* Windows* 10.  In the blog post, I take a look at how Windows 10 behaves across processor generations, and how its behavior compares to Ubuntu* 16 (they are actually pretty similar in philosophy).