Intel Blog – Observations from Uppsala

Intel Blog: Parallelizing a Virtual Platform Model

There are many ways to use threading and parallelization to improve the performance of virtual platforms. It is not always easy to successfully use parallelization – it very much depends on the nature of the workloads and model setup – but when it works it can really help. I recently published a long blog post at Intel, detailing an idealized example of threading for a device model that is shipping in the Simics training package.

Intel Blog: How to Boot Linux on Virtual Platform

Booting a software stack on a virtual platform is a necessary part of most software flows. It might seem simple, but in practice there are many different ways that it can happen.

In a recent Intel Blog post, I go through five ways to boot Linux on virtual platforms. Including the cases of doing it just like the hardware, but also how to “cheat” and directly boot from a kernel without first wrapping it in a disk image or similar.

Intel Blog: How Simics Executes Instructions

I recently added a blog post to the Intel Software blog about how the Intel Simics Simulator executes target-software instructions. The blog post appeared just before DVCon Europe (last week) and I did not have time to put a reflector here earlier.

Intel Blog: Demonstrating Simics Threading using RISC-V Simple

In my third post based on the Simics RISC-V simple virtual platform, I use the it to demonstrate how the Intel Simics simulator uses multiple host threads to simulate multiple target cores. The RISC-V platform is nice in that it has less noise than more complex platforms, allowing for clear and simple measurements.

Intel Blog: Playing with Instruction Sets in the Public Simics RISC-V Platform

As noted previously, the Public Release of the Intel Simics Simulator has added a simple RISC-V virtual platform.

In my second blog post about the platform, I reconfigure the instruction set, crash Linux, debug the issue, and reconfigure the software to match the hardware.

Intel Blog: Public Simics RISC-V Simple Virtual Platform

The 2023-19 version of the Public Release of the Intel Simics Simulator added a simple RISC-V virtual platform. This is the second architecture supported by the public release, after x86.

I will be producing a series of blog posts to show a bit of what the you can do with this virtual platform. The f irst Intel blog post talks about system-level simulation use cases, in particular networking and simulating x86 and RISC-V systems together.

Intel Blog: Open-Sourcing the Device Modeling Language

The Device Modeling Language (DML) that we have used with Simics since 2005 is now available in open source! Some more details and examples of what DML looks like can be found in an Intel blog post.

Intel Blog: Catching a Tricky Bug by Running Simics on Simics

I recently published a long post on the Intel Community Blog, talking about how my colleague Evgeny solved a nicely complicated bug using Simics-on-Simics. The bug involved UEFI, an operating system, SMM, SMI, and virtualization. Just another day in the office (or more like a year, given how long it took to get this one resolved).

Some Notes on Temporal Decoupling (Reposted)

This blog post was originally posted at Intel back in 2018, but it has since been retired from the Intel blog system. As it is of general interest (in my opinion), here is a reposting (with a few small updates here and there).

Temporal decoupling is a key technology in virtual platforms, and can speed up the execution of a system by several orders of magnitude. In my own experiments, I have seen it provide a speedup of more than 1000x. Here, I will dig a little deeper into temporal decoupling and its semantic effects.

Intel Blog: How Teaching Users Drives Product Improvements in Simics

I have a post out on the Intel Software blog about my experience developing and delivering training for Simics over the past few years. A key observation is that building training is a great way to test the product, and drives changes and improvements in the product. The blog is found at https://software.intel.com/content/www/us/en/develop/articles/teaching-users-drives-product-improvements-in-simics-sw.html

Intel Blog Post: “Quit Thinking and Look” – Mea Culpa Chasing a Performance Bug

I have written before about the debug advice to “Quit thinking and look.” It means that you should not form conclusions prematurely. Stop and look at what is going on instead of guessing and cooking up theoretical scenarios. Sound advice that I completely failed to follow in the case that I just chronicled on my Intel Blog: https://software.intel.com/en-us/blogs/2020/03/18/quit-thinking-and-look-chasing-simics-performance

Intel Blog Post: Shift-Left for a Snowy Ridge

There is a new blog post on the Intel Developer Zone on how we used Simics virtual platforms for the new Intel® Atom® P5900 series of system-on-chip (previously known as Snow Ridge). It talks about how shift-left works both inside of Intel and with our customers for the new chip, and the kinds of virtual platform models you use for different types of use cases.

See https://software.intel.com/en-us/blogs/2020/03/17/seeing-the-early-snow-on-the-ridge

Intel Blog Post: Simulating Caches 10x Faster with Simics

Earlier this year, Arianna Delsante defended her Master’s Thesis in computer science at Uppsala University. Her thesis topic was to speed up cache and branch prediction simulation in Simics, and in the end she got a speed up of about 10x compared to previous implementations in Simics. I explain a bit more about cache simulation in fast functional simulators and what she did in my latest Intel Developer Zone Blog post, “Speeding-Up Cache Simulation in Simics by 10x“.

Intel Blog: A Mountain and Threading for Simics 6

A new short blog post on my Intel Developer Zone blog talks about the improved threading simulation core we have added in Simics version 6… and about how a colleague of mine climbed to the top of the highest mountain in Europe and showed a flag with our new Simics icon! Read the story at https://software.intel.com/en-us/blogs/2019/09/10/simics-6-at-the-mountain-top.

Intel Blog: Simics 6 Device Register Coverage

I have a new blog post out on the Intel Developer Zone, about the Simics 6 device register coverage feature. I use device register coverage to look at how different operating systems use the same hardware. The differences are significant, demonstrating the (rather expected) observation that different software stacks use the same hardware in different ways.