Earlier this year, Arianna Delsante defended her Master’s Thesis in computer science at Uppsala University. Her thesis topic was to speed up cache and branch prediction simulation in Simics, and in the end she got a speed up of about 10x compared to previous implementations in Simics. I explain a bit more about cache simulation in fast functional simulators and what she did in my latest Intel Developer Zone Blog post, “Speeding-Up Cache Simulation in Simics by 10x“.Continue reading “Intel Blog Post: Simulating Caches 10x Faster with Simics”
A new short blog post on my Intel Developer Zone blog talks about the improved threading simulation core we have added in Simics version 6… and about how a colleague of mine climbed to the top of the highest mountain in Europe and showed a flag with our new Simics icon! Read the story at https://software.intel.com/en-us/blogs/2019/09/10/simics-6-at-the-mountain-top.
I have a new blog post out on the Intel Developer Zone, about the Simics 6 device register coverage feature. I use device register coverage to look at how different operating systems use the same hardware. The differences are significant, demonstrating the (rather expected) observation that different software stacks use the same hardware in different ways.Continue reading “Intel Blog: Simics 6 Device Register Coverage”