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Observations from Uppsala Computer Simulation, Virtual Platforms, Embedded Programming, Multicore and More (by Jakob Engblom)

Category Archives: Eda

Chip design stuff

S4D 2012 – Notes

2012 September 24 22:11 / 2 Comments / Jakob

Last week, I attended my fourth System, Software, SoC and Silicon Degug conference (S4D) in a row. I think the silicon part is getting less attention these days, most of the papers were on how to debug software. Often with the help of hardware, and with an angle to how software runs in SoCs and systems. I presented a paper reviewing the technology and history of reverse debugging, which went down pretty well.

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Posted in: appearances, articles, conferences, EDA, embedded software, embedded systeme / Tagged: debugging, Hardware debug support, S4D, software

Some Fun Cache Results from Carbon

2012 July 6 20:40 / 2 Comments / Jakob

Carbon Design Systems have been on a veritable blogging spree recently, pushing out a large number of posts around various topics. Maybe a bit brief for my taste in most cases (I have a tendency to throw out 1000+ word pseudo-articles when I take the time to write a blog), but sometimes very interesting nevertheless. I particularly liked a few posts on cache analysis, as they presented some good insight into not-quite-expected processor and cache behaviors.

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Posted in: computer architecture, computer simulation technology, EDA, ESL / Tagged: cache, Carbon, cycle accuracy, performance optimization

Carbon “Swap ‘n’ Play” – A New Implementation of an Old Idea

2012 May 1 20:53 / 2 Comments / Jakob

Carbon Design Systems have been quite busy lately with a flurry of blog posts about various aspects of virtual prototype technology. Mostly good stuff, and I tend to agree with their push that a good approach is to mix fast timing-simplified models with RTL-derived cycle-accurate models. There are exceptions to this, in particular exploratoty architecture and design where AT-style models are needed. Recently, they posted about their new Swap ‘n’ Play technology, which is a old proven idea that has now been reimplemented using ARM fast simulators and Carbon-generated ARM processor models.

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Posted in: computer architecture, computer simulation technology, ESL, virtual platforms / Tagged: Bill Neifert, Carbon Technology, Checkpointing, SimOS, Simpoint

Register Design Languages – DSL or not?

2011 July 27 22:20 / Leave a Comment / Jakob

Recently, Gary Stringham has been running a series of interviews with providers of register design tools on his website. Register design tools seems to be an active area with several small companies (and some open-source tools) fighting for the market. I have written about Gary Stringham and register designs before, and it is an area that keeps fascinating me. There is something about the task of register design that keeps it separate from the main hardware design languages, tools, and flows.The different approaches taken by the tools supporting the register design task also illustrates some points about programming language standards, domain-specific languages, and exchange formats that I want to address.

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Posted in: ESL, programming / Tagged: Domain-specific languages, Gary Stringham, Register Design Languages

EETimes: James Aldis on Performance Modeling

2011 March 3 22:13 / Leave a Comment / Jakob

James Aldis of TI has published an article in the EEtimes about how Texas Instruments uses SystemC in the modeling of their OMAP2 platform. SystemC is used for early architecture modeling and performance analysis, but not really for a virtual platform that can actually run software. The article offers a good insight into the virtual platform use of hardware designers, which is significantly different from the virtual platform use of software designers.
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Posted in: computer simulation technology, ESL, virtual platforms / Tagged: hardware design, hardware modeling, James Aldis, OMAP, performance optimization, TI, Virtio

Interrupts and Temporal Decoupling

2011 February 27 23:09 / 2 Comments / Jakob

I am just finishing off reading the chapters of the Processor and System-on-Chip Simulation book (where I was part of contributing a chapter), and just read through the chapter about the Tensilica instruction-set simulator (ISS) solutions written by Grant Martin, Nenad Nedeljkovic and David Heine. They have a slightly different architecture from most other ISS solutions, since that they have an inherently variable target in the configurable and extensible Tensilica cores. However, the more interesting part of the chapter was the discussion on system modeling beyond the core. In particular, how they deal with interrupts to the core in the context of a temporally decoupled simulation.

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Posted in: books, computer simulation technology, ESL, virtual platforms / Tagged: Grant Martin, interrupt, Temporal decoupling, Tensilica, virtual

S4D 2010 Part 2

2010 September 19 21:10 / 4 Comments / Jakob

My previous post on S4D did omit some of my notes from the conference. In particular, the very entertaining and serious keynote of Barry Lock from Lauterbach and some more philosophical observations on the nature of debugging.

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Posted in: EDA, embedded, embedded software, embedded systeme, programming / Tagged: Barry Lock, debugging, Lauterbach, S4D

S4D 2010

2010 September 15 09:02 / 12 Comments / Jakob

Looks like S4D (and the co-located FDL) is becoming my most regular conference. S4D is a very interactive event. With some 20 to 30 people in the room, many of them also presenting papers at the conference, it turns into a workshop at its best. There were plenty of discussion going on during sessions and the breaks, and I think we all got new insights and ideas.

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Posted in: appearances, computer simulation technology, conferences, EDA, multicore debug, security, virtual platforms / Tagged: ARM, Debug, ESCUG, FDL, Infineon, Intel, John Aynsley, Pat Brouillette, S4D, Simon Davidmann, Southampton, ST, SystemC, Thorsten Grötker, TrustZone

Additional Notes on Transporting Bugs with Checkpoints

2010 September 15 06:38 / 2 Comments / Jakob

This post features some additional notes on the topic of transporting bugs with checkpoints, which is the subject of a paper at the S4D 2010 conference.

The idea of transporting bugs with checkpoints is some ways obvious. If you have a checkpoint of a state, of course you move it. Right? However, changing how you think about reporting bugs takes time. There are also some practical issues to be resolved. The S4D paper goes into some of the aspects of making checkpointing practical.

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Posted in: appearances, articles, computer simulation technology, EDA, programming, virtual machines, virtual platforms / Tagged: Checkpointing, debugging, S4D, Simics

S4D Paper on Transporting Bugs with Checkpoints

2010 August 31 19:40 / 2 Comments / Jakob

I have a paper about “Transporting Bugs with Checkpoints” to be presented at the S4D (System, Software, SoC and Silicon Debug) conference in Southampton, UK, on September 15 and 16, 2010. The core concept presented is to leverage Simics checkpointing to capture and move a bug from the bug reporter to the responsible developer. It is a fairly simple idea, but getting it to work efficiently does require that some things are done right. See the longer Wind River blog posting about this topic for a few more details.

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Posted in: appearances, computer simulation technology, conferences, EDA, virtual machines, virtual platforms, virtualization, Wind River Blog / Tagged: Checkpointing, debugging, S4D

Describe is not the same as Design

2010 February 15 21:56 / 5 Comments / Jakob

The discussion on my previous blog post about “the ideal ESL language” made me think some more about the purpose of a hardware modeling or description language. If you look closely, you realize that there are two quite different goals being pursued by the tools and languages discussed there.

On one hand, we have the task of supporting the design of new hardware bits, for the purpose of creating it. On the other hand, we have the task of describing a particular design for the purpose of simulating it. These two are not necessarily the same.

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Posted in: computer simulation technology, EDA, ESL, programming, virtual platforms / Tagged: DML

Neat Register Design to Avoid Races

2010 January 28 19:59 / 1 Comment / Jakob

raceconditionIn his most recent Embedded Bridge Newsletter, Gary Stringham describes a solution to a common read-modify-write race-condition hazard on device registers accessed by multiple software units in parallel. Some of the solutions are really neat!

I have seen the “write 1 clears” solution before in real hardware, but I was not aware of the other two variants. The idea of having a “write mask” in one half of a 32-bit word is really clever.

However, this got me thinking about what the fundamental issue here really is.

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Posted in: embedded software, embedded systeme, ESL, programming / Tagged: 64-bit computing, device driver, Gary Stringham, high-level synthesis, programming register, race condition

CoWare SystemC Checkpointing

2009 December 29 13:02 / Leave a Comment / Jakob

gearsContinuing on my series of posts about checkpointing in virtual platforms (see previous posts Simics, Cadence, our FDL paper), I have finally found a decent description of how CoWare does things for SystemC. It is pretty much the same approach as that taken by Cadence, in that it uses full stores a complete process state to disk, and uses special callbacks to handle the connection to open files and similar local resources on a system. The approach is described in a paper called  “A Checkpoint/Restore Framework for SystemC-Based Virtual Platforms”, by Stefan Kraemer and Reiner Leupers of RWTH Aachen, and Dietmar Petras, and Thomas Philipp of CoWare, published at the International Symposium on System-on-Chip, in Tampere, Finland, in October of 2009.

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Posted in: computer simulation technology, ESL, programming, virtual platforms / Tagged: Checkpointing, CoWare, Mambo, Reiner Leupers, Simics, SimOS, Stefan Kraemer, SystemC

The System, Not the Parts

2009 December 19 20:38 / Leave a Comment / Jakob

Peter days world of businessI just listened to the November 16, 2009, issue of the BBC podcast called “Peter Day’s World of Business“. It is a rerun (in memoriam) of an interview with business professor Russell Ackoff, which was originally published in 2007.

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Posted in: business issues, ESL, virtual platforms / Tagged: Peter Day, podcast commentary, Russel Ackoff

The Dream ESL Language

2009 November 27 20:51 / 11 Comments / Jakob

fdllogosmall This post is a belated comment on the FDL 2009 conference that I attended some months ago. I have had some things in mind for a while, but some recent podcast listening has brought the issues to front again. What has been striking is the extent to which FDL was about languages only to a very small degree. Compared to programming-language conferences like PLDI, there was precious little innovation going on in input languages, and very little concern for the programming aspects of virtual platform design and hardware modeling.

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Posted in: computer simulation technology, EDA, programming, virtual platforms / Tagged: FDL

How (Not) To Present Parallel Programming Results

2009 October 5 14:06 / Leave a Comment / Jakob

46daclogoSCDSource ran a short but good article summarizing a few DAC talks that I would liked to attend. it mostly about the experience of long-term parallel programming research David Bailey in presenting results in the field…

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Posted in: conferences, EDA, multicore computer architecture / Tagged: DAC, DAC 2009, parallelized software

The S4D Debug Conference

2009 September 27 20:38 / 3 Comments / Jakob

S4DAn unplanned and unexpected bonus with my trip to the FDL 2009 conference was the co-located S4D conference. S4D means System, Software, SoC and Silicon Debug, and is a conference that has grown out of some recent workshops on the topic of debugging, as seen from the perspective of hardware designers (mostly). S4D was part of the same package as FDL and DASIP, entrance to one conference got you into the other two too. As I did not know about S4D until quite late in the process, this was a great opportunity for me to look at what they were doing.

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Posted in: appearances, conferences, EDA, embedded, programming, virtual platforms / Tagged: debugging, FDL, gdb, Hardware debug support, p4080, S4D

FDL Impressions

2009 September 24 08:24 / Leave a Comment / Jakob

fdllogosmallThis is end of the second day of FDL 2009, and it is proving to be quite an interesting experience. The location is very bad, apart from the weather (coming from a Swedish Fall where temperatures are dropping towards 10 C, to a sunny 27 C is quite nice). But Sophia Antipolis is just a tech park with some hotels, and you cannot get anywhere interesting or civilized without a car. No shops, no restaurants except for hotels, and so sidewalks in parts.

But the conference is good enough to be worth the bodily discomforts. And I did find a nice Parcours Sportif for the morning run, as well as a nice breakfast buffet at the Mercure Hotel.

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Posted in: appearances, conferences, EDA, virtual platforms / Tagged: Checkpointing, FDL, Peter Flake, SystemC

Checkpointing in SystemC @ FDL

2009 August 8 20:48 / Leave a Comment / Jakob

fdllogosmallAlong with Marius Monton and Mark Burton of GreenSocs, I will be presenting a paper on checkpointing and SystemC at the FDL, Forum on Specification and Design Languages, in late September 2009.

The paper will explain how we did Simics-style checkpointing in SystemC, using the GreenSocs GreenConfig mechanisms to obtain an approximation for the Simics attribute system.

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Posted in: appearances, articles, computer simulation technology, conferences, ESL, virtual platforms / Tagged: Checkpointing, FDL, GreenSocs, Marius Monton, Mark Burton, Simics, SystemC

Conquering Software with Software High-Level Synthesis

2009 July 31 23:12 / 5 Comments / Jakob

46daclogoThis post is a follow-up to the DAC panel discussion we had yesterday on how to conquer hardware-dependent software development. Most of the panel turned into a very useful dialogue on virtual platforms and how they are created, not really discussing how to actually use them for easing low-level software development. We did get to software eventually though, and had another good dialogue with the audience. Thanks to the tough DAC participants who held out to the end of the last panel of the last day!

As is often the case, after the panel has ended, I realized several good and important points that I never got around to making… and of those one struck me as worthy of a blog post in its own right.It is the issue of how high-level synthesis can help software design.

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Posted in: conferences, EDA, embedded software, ESL, programming / Tagged: DAC, device driver, high-level synthesis, Kees Vissers, Xilinx

The TLM DAC

2009 July 30 23:47 / 5 Comments / Jakob

46daclogoThe past few days here at DAC, a big theme has been transaction level modeling (TLM).

TLM is often considered to be SystemC TLM-2.0. Most of the statements from the EDA companies are to the effect that SystemC TLM-2.0 solves the problem of combining models from different sources. Scratching the surface of this happy picture, it is clear that it is not that simple…

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Posted in: conferences, EDA, ESL, virtual platforms / Tagged: DAC, GreenSocs, Simics, SystemC, tlm, TLM-2.0, Virtutech

DAC Traffic Report

2009 July 30 22:25 / Leave a Comment / Jakob

46daclogoI finally got to spend some time at the DAC show floor on Thursday (which was day four and the last day of the show). It was very quiet, not many people around, and many booths also running with low staffing. However, unlike the Embedded Systems Conference, this last day was not indicative of the show overall.

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Posted in: conferences, EDA / Tagged: Carbon, DAC, Forte

DAC 2009 Panel and Paper

2009 July 1 13:38 / Leave a Comment / Jakob

46daclogoThe 46th Design Automation Conference (DAC) is coming up in San Francisco in the US, last week of July. For me, this will be the first time I ever go to DAC. I have been to a couple of Design Automation and Test Europe  (DATE) conferences before, but DAC is supposedly even bigger as an event for the EDA and related communities. I have the honor to be on a panel this year, as well as co-authoring a paper on software validation.

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Posted in: appearances, conferences, EDA, virtual platforms / Tagged: Cadence, DAC, hardware-software interface, Jason Andrews, Ross Dickson, Wild West panel

Cadence Industry Insight: “Virtual Platforms Unite HW and SW”

2009 May 22 07:41 / Leave a Comment / Jakob

opinionAnother Cadence guest blog entry, about the overall impact of virtual platforms on the interaction between hardware and software designers. Essentially, virtual platforms are a great tool to make software and hardware people talk to each other more, since it provides a common basis for understanding.

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Posted in: articles, embedded software, embedded systeme, ESL, programming, virtual platforms / Tagged: Cadence, Domain-specific languages, ISX, Richard Goering, scdsource, software testing

Guest Blog at Cadence: “Way Worse than the Real Thing”

2009 May 20 11:45 / Leave a Comment / Jakob

avataraspxVirtutech and Cadence yesterday announced the integration of Virtutech Simics and Cadence ISX (Incisive Software Extensions), which is essentially a directed random test framework for software. With this tool integration, you can systematically test low-level software and the hardware-software (device driver) interface of a system, leveraging a virtual platform.

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Posted in: articles, computer simulation technology, embedded software, ESL, programming, virtual platforms / Tagged: Cadence, ISX, Simics, software testing, Virtutech

I Want One… Trillion Instructions…

2009 March 28 22:10 / 4 Comments / Jakob

There is an eternal debate going on in virtual platform land over what the right kind of abstraction is for each job. Depending on background, people favor different levels. For those with a hardware background, more details tend to be the comfort zone, while for those with a software background like myself, we are quite comfortable with less details. I recently did some experiments about the use of quite low levels of hardware modeling details for early architecture exploration and system specification.

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Posted in: computer simulation technology, ESL, programming, virtual platforms / Tagged: abstraction levels, device driver, Dr. Evil, linux, mpc8641d, Simics

Adding to Schirrmeister’s Virtual Platform Myth Busting

2009 February 18 13:22 / 2 Comments / Jakob

opinionFrank Schirrmeister of Synopsys recently published a blog post called “Busting Virtual Platform Myths – Part 1: “Virtual Platforms are for application software only”. In it, he is refuting a claim by Eve that virtual platforms are for application-level software-development only, basically claiming that they are mostly for driver and OS development and citing some Synopsys-Virtio Innovator examples of such uses. In his view, most appication-software is being developed using host-compiled techniques.  I want to add to this refutal by adding that application-software is surely a very important — and large — use case for virtual platforms.

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Posted in: embedded software, embedded systeme, ESL, multicore software, programming, virtual platforms / Tagged: clock-cycle models, cycle accuracy, Eve, Frank Schirrmeister, freescale, Grant Martin, Lauro Ritazzi, p4080, Simics, software tools, Synopsys

Eclipse Linux Kernel Indexing Works

2009 February 1 18:10 / 1 Comment / Jakob

Edited on 2009-Feb-01, to include the link to the illustrated guide that really helps you get there faster. Thanks Simon! Also, promoted to front page, original post was put up on 2008-Nov-09.

Thanks to Simon Kågströms post (and the even better second-generation with screenshots) about using Eclipse for the Linux kernel, I have a much nicer work environment now for my ongoing work in learning Linux device drivers on PowerPC, which has helped me work my way through several hard-to-figure-out system calls. Read More →

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Posted in: desktop software, embedded software, ESL, programming, uncategorized / Tagged: eclipse, linux, Linux kernel, operating systems, Simon Kågström

EDA Tech Forum Article on Ecosystem Enablement

2009 January 10 22:17 / Leave a Comment / Jakob

I have an article about ecosystem enablement for new hardware, co-authored with Richard Schnur of Freescale published in the December 2008 issue of EDA Tech Forum. The core concept is that a virtual platform solution makes it possible to get a new chip to market faster with better software support, and even enables virtual design-in of a chip at OEM customers before hardware becomes available. The article builds on our joint experience with the QorIQ P4080 launch in the Summer of 2008, where we had several operating systems and middleware packages in place at the moment the chip was announced. EDA Tech Forum requires registration, but it was still free, and there are many other good articles available.

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Posted in: articles, business issues, EDA, ESL, virtual platforms / Tagged: ecosystem enablement, EDA Tech Forum, freescale, p4080, qoriq

Threading or Not as a Hardware Modeling Paradigm

2009 January 1 09:31 / Leave a Comment / Jakob

gears-modelingTraditional hardware design languages like Verilog were designed to model naturally concurrent behavior, and they naturally leaned on a concept of threads to express this. This idea of independent threads was brought over into the design of SystemC, where it was manifested as cooperative multitasking using a user-level threading package. While threads might at first glance look “natural” as a modeling paradigm for hardware simulations, it is really not a good choice for high-performance simulation.

In practice, threading as a paradigm for software models of hardware circuits connected to a programmable processor brings more problems than it provides benefits in terms of “natural” modeling.

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Posted in: computer simulation technology, EDA, ESL, multicore software, programming, virtual platforms / Tagged: Erlang, multicore, Reactive programming, sampalib, Simics, SystemC, Threading

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