virtual things – Observations from Uppsala

“Pre-Silicon and Post-Silicon Virtual Platforms” – Computer and System Architecture Unraveled Event Six

After a rather long break, we finally had another Computer and System Architecture Unraveled meetup. This time, we had two speakers talking about virtual platforms. Fredrik Larsson from the Simics team at Intel addressed pre-silicon use cases, and Jakob Engblom from the VLAB Works team at Cadence (i.e., myself) talked about uses in Automotive and embedded (mostly post-silicon).

DAC 2025 – All About AI

The 62nd Design Automation Conference (DAC 62) took place in San Francisco, California, USA, from June 22 to 25, 2025. It was the first time in three years that I attended the DAC (this blog is a little bit late, sorry for that). For those that do not know, the DAC is the biggest show in EDA, combining a major research conference with an industry exhibition and engineering track. This year the theme was AI (Artificial Intelligence), and not much else.

Working in EDA for Real (Finally)

In late May, the VLAB Works part of ASTC was acquired by Cadence, and as a result I am finally working in EDA for real. What a change! When I started working with the Simics simulator at Virtutech in 2002, we were at pains to distance ourselves from EDA. Now, almost 25 years later, I am working in one of the big three EDA companies.

New Job, New Simulator

As already leaked by LinkedIn, I recently started a new job at ASTC, as Global Technical Marketing Manager for the VLAB virtual platform product. This is my first major change of job I since I joined Virtutech to work on the Simics simulator back in 2002. It is both a big change and a small change – staying in the world of virtual platforms, but working with a new product that is quite different from Simics. In fact, more things are different and new and fresh than the same…

Reversing out of Reverse

The Intel Simics simulator version 7 removed a long-standing feature from the simulator framework. Reverse execution is no longer available. In its place, in-memory snapshots were introduced, which arguably offer most of the benefits at a lower implementation cost. What happened? I’ve been asked about the reasoning behind the chance on several occasions since I left Intel. I’d like to share my perspective on the decision, as it highlights the challenges of turning an idea into a robust, shippable feature.

DVCon Europe 2024 – AI and More

The 2024 DVCon (Design and Verification) Europe conference took place on October 15 and 16, in its traditional location at the Holiday Inn Munich City Centre. This year there was even more talk of artificial intelligence than last year, and quite a few sessions related to virtual platforms. And lots of other interesting presentations and discussions.

Time to Do Something New

The time has come to do something new. I am leaving Intel (and the Intel Simics team) at the end of September (2024). After more than twenty years with the team and the product this is a big step into the unknown. But when Intel offered a “retirement” package as part of its current round of cost reduction measures, I felt that it was a golden opportunity to find something new to do.

The Event at the End of Universe

This is a short story from the world of virtual platforms. It is about how hard – or easy – it is to model a simple and well-defined hardware behavior that turns out to mercilessly expose the limitations of simulation kernels.

Intel Blog: Parallelizing a Virtual Platform Model

There are many ways to use threading and parallelization to improve the performance of virtual platforms. It is not always easy to successfully use parallelization – it very much depends on the nature of the workloads and model setup – but when it works it can really help. I recently published a long blog post at Intel, detailing an idealized example of threading for a device model that is shipping in the Simics training package.

Intel Blog: How to Boot Linux on Virtual Platform

Booting a software stack on a virtual platform is a necessary part of most software flows. It might seem simple, but in practice there are many different ways that it can happen.

In a recent Intel Blog post, I go through five ways to boot Linux on virtual platforms. Including the cases of doing it just like the hardware, but also how to “cheat” and directly boot from a kernel without first wrapping it in a disk image or similar.

DVCon Europe 2023 – 10th Anniversary Edition

The 2023 DVCon (Design and Verification) Europe conference took place on November 14 and 15, in the traditional location of the Holiday Inn Munich City Center. This was the 10^th time the conference took place, serving as an excuse for a great anniversary dinner. Also new was the addition of a research track to provide academics publishing at the conference with the academic credit their work deserves. This year had a large number of papers related to virtual platforms, so writing this report has taken me longer than usual. There was just so much to cover.

Intel Blog: How Simics Executes Instructions

I recently added a blog post to the Intel Software blog about how the Intel Simics Simulator executes target-software instructions. The blog post appeared just before DVCon Europe (last week) and I did not have time to put a reflector here earlier.

Intel Blog: Demonstrating Simics Threading using RISC-V Simple

In my third post based on the Simics RISC-V simple virtual platform, I use the it to demonstrate how the Intel Simics simulator uses multiple host threads to simulate multiple target cores. The RISC-V platform is nice in that it has less noise than more complex platforms, allowing for clear and simple measurements.

That’s Odd: How iCue and Windows 11 Ruin Simics Performance

While working on some screenshots for an upcoming blog, I noticed something that something was off with the performance of Simics on my Windows 11 laptop. The CPU load did not quite go as high as I am used to – typically, compute-intense run should get close to 100% processor load using a single host thread to execute the simulation. Instead, I got to no more than about 50%, which was decidedly odd. I also had a screenshot from a few days earlier that showed some 90% CPU load. Turns out the culprit was a combination of factors, including the Windows 11 scheduler and the Corsair iCUE software pack.

Intel Blog: Playing with Instruction Sets in the Public Simics RISC-V Platform

As noted previously, the Public Release of the Intel Simics Simulator has added a simple RISC-V virtual platform.

In my second blog post about the platform, I reconfigure the instruction set, crash Linux, debug the issue, and reconfigure the software to match the hardware.